參數(shù)資料
型號: CYRF69213-40LFXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Programmable Radio on Chip Low Power
中文描述: SPECIALTY TELECOM CIRCUIT, QCC40
封裝: 6 X 6 MM, LEAD FREE, M0-220, QFN-40
文件頁數(shù): 23/85頁
文件大?。?/td> 731K
代理商: CYRF69213-40LFXC
CYRF69213
Document #: 001-07552 Rev. *B
Page 23 of 85
Table 33.CPU/USB Clock Config CPUCLKCR) [0x30] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Read/Write
Default
Bit 7
Bit 6
Reserved
USB CLK/2
Disable
R/W
0
USB CLK
Select
R/W
0
Reserved
CPUCLK Se-
lect
R/W
0
0
0
0
0
0
Reserved
USB CLK/2 Disable
This bit only affects the USBCLK when the source is the external crystal oscillator. When the USBCLK source is the Internal
24-MHz Oscillator, the divide by two is always enabled
0 = USBCLK source is divided by two. This is the correct setting to use when the Internal 24-MHz Oscillator is used, or when the
external source is used with a 24-MHz clock
1 = USBCLK is undivided. Use this setting only with a 12-MHz external clock
USB CLK Select
This bit controls the clock source for the USB SIE
0 = Internal 24-MHz Oscillator. With the presence of USB traffic, the Internal 24-MHz Oscillator can be trimmed to meet the USB
requirement of 1.5% tolerance (see
Table 35
)
1 = External clock—Internal Oscillator is not trimmed to USB traffic.
Proper USB SIE operation requires a 12-MHz or 24-MHz clock accurate to <1.5%
Reserved
CPU CLK Select
0 = Internal 24-MHz Oscillator
1 = External clock—External clock at CLKIN (P0.0) pin
Note
The CPU speed selection is configured using the OSC_CR0 Register (
Table 34
)
Bit 5
Bits 4:1
Bit 0
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CYRF69213A-40LTXC 功能描述:射頻收發(fā)器 CYRF69213A-40LTXC RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray
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