參數(shù)資料
型號： CC113LRTKT
廠商： TEXAS INSTRUMENTS INC
元件分類： 無繩電話/電話
英文描述： TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC20
封裝： 4 X 4 MM, GREEN, PLASTIC, VQFN-20
文件頁數(shù)： 10/75頁
文件大?。?/td> 1454K
代理商： CC113LRTKT
CC113L
SWRS108A
Page 18 of 68
Component
Value at 315 MHz
Value at 433 MHz
Value at 868/915 MHz
C121
1 pF
C122
6.8 pF
3.9 pF
1.5 pF
C123
12 pF
8.2 pF
3.3 pF
C124
220 pF
100 pF
C125
6.8 pF
5.6 pF
C126
220 pF
100 pF
C131
6.8 pF
3.9 pF
1.5 pF
L121
12 nH
L122
33 nH
27 nH
18 nH
L123
18 nH
22 nH
12 nH
L124
33 nH
27 nH
12 nH
L131
12 nH
L132
33 nH
27 nH
18 nH
Table 14: External Components (characterization circuits)
7.3
Crystal
A crystal in the frequency range 26 - 27 MHz
must be connected between the XOSC_Q1 and
XOSC_Q2 pins. The oscillator is designed for
parallel mode operation of the crystal. In
addition, loading capacitors (C81 and C101)
for the crystal are required. The loading
capacitor values depend on the total load
capacitance, CL, specified for the crystal. The
total load capacitance seen between the
crystal terminals should equal CL for the
crystal to oscillate at the specified frequency.
parasitic
L
C
101
81
1
The parasitic capacitance is constituted by pin
input capacitance and PCB stray capacitance.
Total parasitic capacitance is typically 2.5 pF.
The crystal oscillator is amplitude regulated.
This means that a high current is used to start
up the oscillations. When the amplitude builds
up, the current is reduced to what is necessary
to maintain approximately 0.4 Vpp signal
swing. This ensures a fast start-up, and keeps
the drive level to a minimum. The ESR of the
crystal should be within the specification in
order
to
ensure
a
reliable
start-up
(see Section 4.3 on page 12).
The initial tolerance, temperature drift, aging
and load pulling should be carefully specified
in order to meet the required frequency
accuracy in a certain application.
Avoid routing digital signals with sharp edges
close to XOSC_Q1 PCB track or underneath
the crystal Q1 pad as this may shift the crystal
dc operating point and result in duty cycle
variation.
7.4
Reference Signal
The chip can alternatively be operated with a
reference signal from 26 - 27 MHz instead of a
crystal. This input clock can either be a full-
swing digital signal (0 V to VDD) or a sine
wave of maximum 1 V peak-peak amplitude.
The reference signal must be connected to the
XOSC_Q1 input. The sine wave must be
connected
to
XOSC_Q1
using
a
serial
capacitor. When using a full-swing digital
signal, this capacitor can be omitted. The
XOSC_Q2 line must be left un-connected. C81
and C101 can be omitted when using a
reference signal.
7.5
Power Supply Decoupling
The power supply must be properly decoupled
close to the supply pins. Note that decoupling
capacitors are not shown in the application
circuit. The placement and the size of the
decoupling capacitors are very important to
achieve
the
optimum
performance.
The
CC113LEM reference designs ([10] and [11])
should be followed closely.
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