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參數(shù)資料
| 型號： | AX88196BLF |
| 廠商： | ASIX Electronics Corporation |
| 英文描述： | Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller with MII Interface |
| 中文描述： | 低引腳數(shù)不符合信息產(chǎn)業(yè)部的PCI接口16位產(chǎn)品個(gè)10/100M快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 41/86頁 |
| 文件大?。?/td> | 551K |
| 代理商： | AX88196BLF |
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ASIX ELECTRONICS CORPORATION
41
AX88196BLF
5.1.20 Transmit Configuration Register (TCR)
Page0 Offset 0DH (Write)
Field
Name
Description
7
FDU
Full Duplex
This bit configure MAC media mode is Full Duplex or not.
0: Half duplex (Default)
1: Full duplex
This duplex setting was wire or with MCR bit-7. Each one goes high then configures MAC
as full-duplex. AX88196B will ignore this bit and MCR bit-7 when using internal PHY.
6
PD
Pad Disable
0: Pad will be added when packet length less than 60. (Default)
1: Pad will not be added when packet length less than 60.
5
RLO
Retry of late collision
0: Don’t retransmit packet when late collision happens. (Default)
1: Retransmit packet when late collision happens.
4:3
-
Reserved
2:1
LB1, LB0 Encoded Loop-back Control
These encoded configuration bits set the type of loop-back that is to be performed.
LB1 LB0
Mode0 0 0 Normal operation (Default)
Mode 1 0 1 Internal AX88196B loop-back
Mode 2 1 0 PHY loop-back
No Define 1 1 Reserved
0
CRC
Inhibit CRC
0: CRC appended by transmitter. (Default)
1: CRC inhibited by transmitter.
5.1.21 Frame Alignment Error Tally Register (CNTR0)
Page0 Offset 0DH (Read)
Field
Name
Description
(Default = 00h)
7:0
CNTR0
This counter is incremented every time a packet is received with a Frame Alignment Error.
The packet must have been recognized by the address recognition logic. The counter is
cleared after the processor reads it.
5.1.22 Data Configuration Register (DCR)
Page0 Offset 0EH (Write)
Field
Name
Description
7:2
-
Reserved
1
-
Reserved
0
WTS
Word Transfer Select (Data Port Only)
0: Selects Data Port with byte-wide transfers. (Default)
1: Selects Data Port with word-wide transfers.
5.1.23 CRC Error Tally Register (CNTR1)
Page0 Offset 0EH (Read)
Field
Name
Description
(Default = 00h)
7:0
CNTR1
This counter is incremented every time a packet is received with a CRC error. The packet
must first be recognized by the address recognition logic. The counter is cleared after the
processor reads it.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX88196L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM |
| AX88613 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88615 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-Port 10/100BASE Ethernet Switch |
| AX88615P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-Port 10/100BASE Ethernet Switch |
| AX8863T | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Low-Dropout, 120mA Linear Regulators |
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