參數(shù)資料
型號(hào)： AX88196BLF
廠商： ASIX Electronics Corporation
英文描述： Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller with MII Interface
中文描述： 低引腳數(shù)不符合信息產(chǎn)業(yè)部的PCI接口16位產(chǎn)品個(gè)10/100M快速以太網(wǎng)控制器
文件頁數(shù)： 18/86頁
文件大小： 551K
代理商： AX88196BLF
ASIX ELECTRONICS CORPORATION
18
AX88196BLF
Linking Buffers
Before the DMA can enter the next contiguous 256 bytes buffer, the address is checked for equality to PSTOP and
to the Boundary Pointer. If neither is reached, the DMA is allowed to use the next buffer.
Buffer Ring Overflow
If the Buffer Ring has been filled and the DMA reaches the Boundary Pointer Address, reception of the current
incoming packet will be discard by the AX88196B. Thus, the packets previously received and still contained in the
Ring will not be destroyed.
End Of Packet Operations
At the end of the packet the AX88196B determines whether the received packet is to be accepted or rejected. It
either branch to a routine to store the or to another routine that recovers the buffers used to store the packet.
If current of packet is accepted then AX88196B write two words of buffer header on receive buffer.
Buffer Header
NPR, Status
Description
D[15:8]: Next Page Pointer
D[7:6]: always zero
D[5]: multicast or broadcast
D[4]: runt packet
D[3]: MII error
D[2]: alignment error
D[1]: CRC error
D[0]: good packet
D[15:11]: always zero
D[10:0]: packet length
Length
Successful Reception
If the packet is successfully received as shown, the DMA is restored to the first buffer used to store the packet
(pointed to by the Current Page Register). The DMA then stores the Receive Status, a Pointer to where the next
packet will be stored and the number of received bytes. Note that the remaining bytes in the last buffer are discarded
and reception of the next packet begins on the next empty 256 byte buffer boundary. The Current Page Register is
then initialized to the next available buffer in the Buffer Ring. (The location of the next buffer had been previously
calculated and temporarily stored in an internal scratchpad register.)
Buffer Recovery For Rejected Packets
If the packet is a runt packet or contains CRC or Frame Alignment errors, it is rejected. The buffer management
logic resets the DMA back to the first buffer page used to store the packet (pointed to by CPR), recovering all
buffers that had been used to store the rejected packet. This operation will not be performed if the AX88196B is
programmed to accept either runt packets or packets with CRC or Frame Alignment errors. The received CRC is
always stored in buffer memory after the last byte of received data for the packet.
相關(guān)PDF資料
PDF描述
AX88658AB 8-Port 10/100/1000BASE-T Ethernet Switch
AX88772_07 USB to 10/100 Fast Ethernet/HomePNA Controller
AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller
AX88780_07 IC,D/A CONVERTER,MC144110DW, 6-BIT,5-15V,SOIC-20,3-7US SER.
AX88780 High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AX88196L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM
AX88613 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller
AX88615 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-Port 10/100BASE Ethernet Switch
AX88615P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-Port 10/100BASE Ethernet Switch
AX8863T 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Low-Dropout, 120mA Linear Regulators
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*