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參數(shù)資料
| 型號： | AX88180 |
| 廠商： | ASIX Electronics Corporation |
| 英文描述： | High-Performance Non-PCI 32-bit 10/100/1000M Gigabit Ethernet Controller |
| 中文描述： | 高性能非PCI 32位10/100/1000千兆以太網(wǎng)控制器 |
| 文件頁數(shù)： | 9/47頁 |
| 文件大?。?/td> | 420K |
| 代理商： | AX88180 |
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AX88180
9
ASIX ELECTRONICS CORPORATION
Asynchronous signal CRS is asserted by the PHY when either the transmitted or
receive medium is non-idle.
Station Management Data Input /Output:
Serial data input/Output transfers from/to the PHY. The transfer protocol conforms
to the IEEE 802.3u MII specification.
Station Management Data Clock:
The timing reference for MDIO. All data transfers on MDIO are synchronized to the
rising edge of this clock.
Interrupt signal from PHY, active low.
MDIO
IO2, PU,
8mA
59
MDC
O2, 8mA
58
PHYINTN I2
46
TXCLK
I2
69
A clock from Giga-PHY operates in MII mode.
If Giga-PHY provides clock for 10/100M in MII mode, AX88180 can use this pin as
reference clock. For normal operation, to connect TXCLK of Giga-PHY with this
pin.
2.3 Host Interface
Table 2 : Host Interface signals group
Pin Name
INTN
Type
TSO, 8mA
Pin NO
102
Pin Description
Interrupt to host system
When the polarity is active high, this signal must be pulled low, otherwise pulled
high in active low environment. Software set the bit6 of command register (CMD) to
response the polarity.
Reset signal: active low.
Reference Clock. This clock may be from host (synchronous mode) or the output of
stand-alone OSC (asynchronous mode).
Wake-up signal to system. When the polarity of system is active high, this signal
must be pulled low, otherwise pulled high in active low environment. Software set
the bit0 of command register (CMD) to response the polarity.
Data bus bit0.
Data bus bit1.
Data bus bit2.
Data bus bit3.
Data bus bit4.
Data bus bit5.
Data bus bit6.
Data bus bit7.
Data bus bit8.
Data bus bit9.
Data bus bit10.
Data bus bit11.
Data bus bit12.
Data bus bit13.
Data bus bit14.
Data bus bit15.
Data bus bit16, internal pull down.
*
Data bus bit17, internal pull down.
*
Data bus bit18, internal pull down.
*
Data bus bit19, internal pull down.
*
Data bus bit20, internal pull down.
*
Data bus bit21, internal pull down.
*
Data bus bit22, internal pull down.
*
Data bus bit23, internal pull down.
*
Data bus bit24, internal pull down.
*
Data bus bit25, internal pull down.
*
RST_N
HCLK
I3
I3
103
104
WAKEUP
TSO, 8mA
115
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
19
18
17
16
15
14
12
11
10
9
7
6
5
3
2
128
127
126
125
124
122
121
120
118
116
114
相關PDF資料 |
PDF描述 |
|---|---|
| AX88190P | 10/100BASE PCMCIA Fast Ethernet MAC Controller |
| AX88195P | 10/100BASE Local CPU Bus Fast Ethernet MAC Controller |
| AX88196BLF | Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller with MII Interface |
| AX88658AB | 8-Port 10/100/1000BASE-T Ethernet Switch |
| AX88772_07 | USB to 10/100 Fast Ethernet/HomePNA Controller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AX88180LF | 制造商:ASIX 功能描述:NON PCI MAC CONTROLLER 10/100/1000 |
| AX88190 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCMCIA Fast Ethernet MAC Controller |
| AX88190AL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCMCIA Fast Ethernet MAC Controller |
| AX88190P | 制造商:ASIX 制造商全稱:ASIX 功能描述:10/100BASE PCMCIA Fast Ethernet MAC Controller |
| AX88195P | 制造商:ASIX 制造商全稱:ASIX 功能描述:10/100BASE Local CPU Bus Fast Ethernet MAC Controller |
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