參數(shù)資料
型號: AX88180
廠商: ASIX Electronics Corporation
英文描述: High-Performance Non-PCI 32-bit 10/100/1000M Gigabit Ethernet Controller
中文描述: 高性能非PCI 32位10/100/1000千兆以太網(wǎng)控制器
文件頁數(shù): 26/47頁
文件大?。?/td> 420K
代理商: AX88180
AX88180
26
ASIX ELECTRONICS CORPORATION
4.28 MDIOCTRL--MDIO Control Register
Offset Address = 0xFC84 Default = 0x0000_0000
Field
Name
Type
Default
31:16
-
R
All 0’s
15
WTEN
R/W
0
Description
Reserved
Write Enable.
Driver enables this bit to issue a write cycle to PHY, it will be auto-cleared when
AX88180 finishes the write cycle
1 = enable
0 = disable
Read Enable.
Driver enables this bit to issue a read cycle to PHY. This bit will be auto-cleared
when AX88180 finishes the read cycle
1 = enable
0 = disable
PHY Register Index
Driver sets this field to define the internal register index of PHY when it accesses
PHY.
Reserved
PHY ID
Driver sets the PHY ID value in this field. AX88180 will refer to this field when
it accesses PHY by MDIO/MDC signals.
14
RDEN
R/W
0
12:8
PHYCRIDX R/W
00000
7:5
4:0
-
PHYID
R
R/W
000
00000
4.29 MDIODP--MDIO Data Port Register
Offset Address = 0xFC88 Default = 0x0000_0000
Field
Name
Type Default
31:16
-
R
All 0’s
15:0
MDPORT R/W
All 0’s
Description
Reserved
PHY Data Port
To or from PHY data is put in this field.
4.30 GPIO_CTRL--GPIO Control Register
Offset Address = 0xFC8C Default = 0x0000_0003
Field
Name
Type
Default
31:10
-
R
All 0’s
9
GPIO1S
R/W
0
Description
Reserved
GPIO1 Status
This bit stands for the pin status of GPIO1 when it is set to input mode.
1 = high state
0 = low state
GPIO0 Status
This bit stands for the pin status of GPIO0 when it is set to input mode.
1 = high state
0 = low state
Reserved
GPIO1 Mode Direction
This field defines the direction of GPIO1 pin.
1 = input mode
0 = output mode
GPIO0 Mode Direction
This field defines the direction of GPIO pin.
1 = input mode
0 = output mode
8
GPIO0S
R/W
0
7:2
1
-
R
All 0’s
1
GPIO1DIR R/W
0
GPIO0DIR R/W
1
Note: For output mode, software must firstly set the bit0 or bit1 to output mode then set bit8 or bit9.
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