
AX88180
4
ASIX ELECTRONICS CORPORATION
4.31 RXINDICATOR--Receive Indicator Register............................................................................................................27
4.32 TXST--TX Status Register.........................................................................................................................................27
4.33 MDCLKPAT--MDC Clock Pattern Register..............................................................................................................27
4.34 RXCHKSUMCNT--RX IP/UDP/TCP Checksum Error Counter...............................................................................27
4.35 RXCRCNT--RX CRC Error Counter.........................................................................................................................28
4.36 TXFAILCNT--TX Fail Counter.................................................................................................................................28
4.37 PROMDPR--EEPROM Data Port Register ...............................................................................................................28
4.38 PROMCTRL--EEPROM Control Register................................................................................................................28
4.39 MAXRXLEN--Max. RX Packet Length Register......................................................................................................29
4.40 HASHTAB0--Hash Table0 Register ..........................................................................................................................29
4.41 HASHTAB1--Hash Table1 Register ..........................................................................................................................29
4.42 HASHTAB2--Hash Table2 Register ..........................................................................................................................29
4.43 HASHTAB3--Hash Table3 Register ..........................................................................................................................29
4.44 DOGTHD0—Watch Dog Timer Threshold0 Register...............................................................................................30
4.45 DOGTHD1—Watch Dog Timer Threshold1 Register...............................................................................................30
4.46 SOFTRST --- Software Reset Register......................................................................................................................30
5.0 Electrical Specification and Timings................................................................................................................................31
5.1 DC Characteristics .......................................................................................................................................................31
5.1.1 Absolute Maximum Ratings..................................................................................................................................31
5.1.2 General Operation Conditions.............................................................................................................................31
5.1.3 Leakage Current and Capacitance.......................................................................................................................31
5.1.4 DC Characteristics of 2.5V IO Pins.....................................................................................................................31
5.1.5 DC Characteristics of 3.3V IO Pins.....................................................................................................................32
5.1.6 Power Consumption.............................................................................................................................................32
5.1.7 Thermal Characteristics.......................................................................................................................................32
5.2 A.C. Timing Characteristics.........................................................................................................................................33
5.2.1 Host Clock............................................................................................................................................................33
5.2.2 Reset Timing.........................................................................................................................................................33
5.2.3 Host Single Write Timing......................................................................................................................................33
5.2.4 Host Burst Write Timing.......................................................................................................................................34
5.2.5 Host Single Read Timing......................................................................................................................................34
5.2.6 Host Burst Read Timing........................................................................................................................................35
5.2.7 RGMII Clock Timing............................................................................................................................................35
5.2.8 RGMII Receive Timing (1000/100/10 Mbps)........................................................................................................36
5.2.9 RGMII Transmit Timing .......................................................................................................................................36
5.2.10 MDIO Timing .....................................................................................................................................................37
5.2.11 Serial EEPROM Timing......................................................................................................................................37
6.0 Package Information.........................................................................................................................................................38
7.0 Ordering Information........................................................................................................................................................39
Appendix A1.
16-bit mode address and data bus...............................................................................................................40
Appendix A2.
32-bit mode address and data bus...............................................................................................................42
Appendix A3.
AX88180 with Giga-PHY Connection.......................................................................................................43
Appendix A4.
Synchronous and asynchronous timing selection.......................................................................................44
Appendix A5.
Wake On LAN (WOL) without driver via Magic Packet...........................................................................45