參數(shù)資料
型號(hào): AT43USB351M-AC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Full-speed/Low-speed USB Microcontroller with ADC and PWM
中文描述: 8-BIT, MROM, 24 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026BBC, LQFP-48
文件頁數(shù): 79/101頁
文件大?。?/td> 624K
代理商: AT43USB351M-AC
79
AT43USB351M
3302E–USB–7/04
Function Address
Register
FADDR
The USB function contains an address register that contains the function address assigned by
the host. This Function Address Register must be programmed by the microcontroller once it
has received a SET_ADDRESS request from the host and completed the status phase of the
transaction. After power up or reset, this register will contain the value of 0x00.
Function Address Register – FADDR
Bit 7 – FEN: Function Enable
The Function Enable bit (FEN) allows the firmware to enable or disable the function endpoints.
The firmware will set this bit after receipt of a reset through the hub, SetPortFea-
ture[PORT_RESET]. Once this bit is set, the USB hardware passes to and from the host.
When the Single Address bit is set, the condition of FEN is ignored.
Bit 6..0 – FADD6...0: Function Address[6:0]
Endpoint Registers
Function Endpoint 0 Control Register – FENDP0_CR
Bit 7 – EPEN: Endpoint Enable
0 = Disable endpoint
1 = Enable endpoint
Bit 6..4 – Reserved
These bits are reserved in the AT43USB351M and will read as zero.
Bit 3 – DTGLE: Data Toggle
Identifies DATA0 or DATA1 packets. This bit will automatically toggle and requires clearing by
the firmware only in certain special circumstances.
Bit 2 – EPDIR: Endpoint Direction
0 = Out
1 = In
Bit 1, 0 – EPTYPE: Endpoint Type
These bits must be programmed as 0, 0.
Bit
7
6
5
4
3
2
1
0
$1FEE
FEN
FADD6
FADD5
FADD4
FADD3
FADD2
FADD1
FADD0
FADDR
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
$1FE5
EPEN
DTGLE
EPDIR
EPTYPE1
EPTYPE0
FENDP0_CR
Read/Write
R/W
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
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