參數(shù)資料
型號(hào)： AT43USB351M-AC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： Full-speed/Low-speed USB Microcontroller with ADC and PWM
中文描述： 8-BIT, MROM, 24 MHz, RISC MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026BBC, LQFP-48
文件頁(yè)數(shù)： 13/101頁(yè)
文件大小： 624K
代理商： AT43USB351M-AC
13
AT43USB351M
3302E–USB–7/04
Table 5.
USB Hub and Function Registers
Name
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GLB_STATE
$1FFB
–
SUSP FLG
RESUME FLG
RMWUPE
CONFG
HADD EN
SPRSR
$1FFA
–
–
–
–
–
FRWUP
RSM
GLB SUSP
SPRSIE
$1FF9
–
–
–
–
–
FRWUP IE
RSM IE
GLB SUSP IE
SPRSMSK
$1FF8
–
–
–
–
–
FRWUP MSK
RSM MSK
GLB SUSP MSK
UISR
$1FF7
SOF INT
EOF2 INT
–
FEP4 INT
FEP3 INT
FEP2 INT
FEP1 INT
FEP0 INT
UIMSKR
$1FF6
SOF MSK
SOF2 MSK
–
FEP3 MSK
HEP0 MSK
FEP2 MSK
FEP1 MSK
FEP0 MSK
UIAR
$1FF5
SOF INTACK
EOF2 INTACK
–
FEP3 INTACK
HEP0 INTACK
FEP2 INTACK
FEP1 INTACK
FEP0 INTACK
UIER
$1FF3
SOF IE
EOF2 IE
–
FEP3 IE
HEP0 IE
FEP2 IE
FEP1 IE
FEP0 IE
UOVCER
$1FF2
–
–
–
–
–
PORT2
–
–
HADDR
$1FEF
SAEN
HADD6
HADD5
HADD4
HADD3
HADD2
HADD1
HADD0
FADDR
$1FEE
FEN
FADD6
FADD5
FADD4
FADD3
FADD2
FADD1
FADD0
FENDP4_CNTR
$1FE6
EPEN
–
–
–
DTGLE
EPDIR
EPTYPE1
EPTYPE0
FENDP0_CNTR
$1FE5
EPEN
–
–
–
DTGLE
EPDIR
EPTYPE1
EPTYPE0
FENDP1_CNTR
$1FE4
EPEN
–
–
–
DTGLE
EPDIR
EPTYPE1
EPTYPE0
FENDP2_CNTR
$1FE3
EPEN
–
–
–
DTGLE
EPDIR
EPTYPE1
EPTYPE0
FENDP3_CNTR
$1FE2
EPEN
–
–
–
DTGLE
EPDIR
EPTYPE1
EPTYPE0
FCSR4
$1FDE
–
–
–
–
STALL SENT
–
RX OUT PACKET
TX CEMPLETE
FCSR0
$1FDD
–
–
–
–
STALL SENT
RX SETUP
RX OUT PACKET
TX COMPLETE
FCSR1
$1FDC
–
–
–
–
STALL SENT
–
RX OUT PACKET
TX COMPLETE
FCSR2
$1FDB
–
–
–
–
STALL SENT
–
RX OUT PACKET
TX COMPLETE
FCSR3
$1FDA
–
–
–
–
STALL SENT
–
RX OUT PACKET
TX COMPLETE
HDR4
$1FD6
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
FDR0
$1FD5
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
FDR1
$1FD4
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
FDR2
$1FD3
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
FDR3
$1FD2
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
FBYTE_CNT4
$1FCE
–
–
BYTCT5
BYTCT4
BYTCT3
BYTCT2
BYTCT1
BYTCT0
FBYTE_CNT0
$1FCD
–
–
BYTCT5
BYTCT4
BYTCT3
BYTCT2
BYTCT1
BYTCT0
FBYTE_CNT1
$1FCC
–
BYTCT6
BYTCT5
BYTCT4
BYTCT3
BYTCT2
BYTCT1
BYTCT0
FBYTE_CNT2
$1FCB
–
BYTCT6
BYTCT5
BYTCT4
BYTCT3
BYTCT2
BYTCT1
BYTCT0
FBYTE_CNT3
$1FCA
–
–
BYTCT5
BYTCT4
BYTCT3
BYTCT2
BYTCT1
BYTCT0
HSTR
$1FC7
–
–
–
–
OVLSC
LPSC
OVI
LPS
HPCON
$1FC5
–
HPCON2
HPCON1
HPCON0
–
HPADD2
HPADD1
HPADD0
HPSTAT3
$1FBA
–
LSP
PPSTAT
PRSTAT
POCI
PSSTAT
PESTAT
PCSTAT
HPSTAT2
$1FB9
–
LSP
PPSTAT
PRSTAT
POCI
PSSTAT
PESTAT
PCSTAT
HPSTAT1
$1FB8
–
LSP
PPSTAT
PRSTAT
POCI
PSSTAT
PESTAT
PCSTAT
HPSCR3
$1FB2
–
–
–
RSTSC
POCIC
PSSC
PESC
PCSC
HPSCR2
$1FB1
–
–
–
RSTSC
POCIC
PSSC
PESC
PCSC
HPSCR1
$1FB0
–
–
–
RSTSC
POCIC
PSSC
PESC
PCSC
PSTATE3
$1FAA
–
–
–
–
–
–
DPSTATE
DMSTATE
PSTATE2
$1FA9
–
–
–
–
–
–
DPSTATE
DMSTATE
FCAR4
$1FA6
CTL DIR
DATA END
FORCE STALL
TX PACKET READY
STALL_SENT-ACK
–
RX_OUT_PACKET_ACK
TX_COMPLETE-ACK
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