參數(shù)資料
型號(hào): AT43USB351M-AC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Full-speed/Low-speed USB Microcontroller with ADC and PWM
中文描述: 8-BIT, MROM, 24 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026BBC, LQFP-48
文件頁(yè)數(shù): 77/101頁(yè)
文件大小: 624K
代理商: AT43USB351M-AC
77
AT43USB351M
3302E–USB–7/04
Interrupt/Bulk IN
Transfers at Function
Endpoint EP1, 2, 3 and
4
The firmware must first condition the endpoint through the Endpoint Control Register,
FENDP1/2/3/4_CNTR:
Set endpoint direction: set EPDIR
Set interrupt or bulk: EPTYPE = 11 or 10
Enable endpoint: set EPEN
The Function Interface Unit receives an IN token from the Host. The FIU responds with NAKs
until TX_PACKET_READY is set. The FIU then sends the data in the FIFO upstream, retrying
until it successfully receives an ACK from the host. Finally, the FIU clears the
TX_PACKET_READY bit and asserts a TX_COMPLETE interrupt.
1.
Read UISR
2.
Read FCSR1/2/3/4
3.
Clear TX_COMPLETE
If more data: fill FIFO, set TX Packet Ready
Wait for TX_COMPLETE interrupt
If no more data: set DATA END in FCAR1/2/3/4
4.
Set UIAR[FEP1/2/3/4 INTACK] to clear the interrupt source
Interrupt/Bulk OUT
Transfers at Function
Endpoint EP1, 2, 3 and
4
The firmware must first condition the endpoint through the Endpoint Control Register,
FENDP1/2/3/4_CNTR:
Set endpoint direction: clear EPDIR
Set interrupt or bulk: EPTYPE = 11 or 10
Enable endpoint: set EPEN
The Function Interface Unit receives an OUT token from the Host with a DATA packet. The
FIU places the incoming data into the FIFO, issues an ACK to the host, and asserts an
RX_OUT interrupt.
1.
Read UISR
2.
Read FCSR1/2/3/4
3.
Read FIFO
4.
Clear RX_OUT
If more data:
Wait for RX_OUT interrupt
If no more data: set DATA END
5.
Set UIAR[FEP1/2/3/4 INTACK] to clear the interrupt source
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