參數(shù)資料
型號: AMIS-53050
英文描述: Frequency Agile Transceiver
中文描述: 捷變頻收發(fā)器
文件頁數(shù): 29/107頁
文件大?。?/td> 2576K
代理商: AMIS-53050
AMIS-53050
Frequency Agile Transceiver
Data Sheet
Table 10: System Clock Control
Mode
CLKout pin
Control
0X0D General options B
Bits
1:0
2:1
0
4:3
Outputs
Frequency: 12, 6, 3MHz or off
POR state: standby, idle, RX, TX
Output in standby
Clock cycles before stop
Comments
Standby
General options A
Idle
Idle config
5.10 Power and Grounds
The AMIS-53050 has four distinct supply voltage inputs and two different ground nodes, respectively. This allows the separation of the
F, analog and digital power supply circuits to reduced coupled n ise in these circuits.. The same principle applies to the ground
nodes, where a separate ground plane can reduce the amount of no e induced into the sensitive RF circuits.
.11 Design Suggestions
5
The foll
ematics
ayouts depict typical board-level solutions for the AMIS-53050:
and board l
R
is
owing sch
Figure 17: Typical Design Schematic
29
AMI Semiconductor
– Jan. 07, M-20639-002
www.amis.com
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