參數(shù)資料
型號(hào)： AMIS-53050
英文描述： Frequency Agile Transceiver
中文描述： 捷變頻收發(fā)器
文件頁(yè)數(shù)： 102/107頁(yè)
文件大小： 2576K
代理商： AMIS-53050
AMIS-53050
Frequency Agile Transceiver
Data Sheet
9.2.10. Digital Test MUX A
nals to be routed to the indicated pins of the AMIS-53050. These signals can help in the development of an
application using the AMIS-53050. The test unlock register code must be written, then this test register is written and then the test
function will be enabled until either is changed or there is a reset of the AMIS-53050, even if the test unlock register code value is
changed.
Table 116: Digit
Bit
Test Pin
Comment
1111
Space Q channel CLK
1110
Mark Q channel CLK
1101
NC
1100
Data Q channel
1011
PN code from
Σ
1010
Start
1001
Analog data out
1000
PLL detect/data out
1111
Space I channel CLK
1110
Mark I channel CLK
1101
PLL detect/NCO out
1100
Energy detected
1011
Data I channel
1010
RF PLL CLK feedback
1001
Is locked (encoder)
1000
TX data
al Test MUX A - 0X4B [75]
This register allows test sig
0111
0110
0101
0100
0011
0010
0001
0000
0111
0110
0101
0100
0011
0010
0001
0000
Energy dwell enable
PLL increment
TX enable
10kHz clock
Software state [3]
Bandgap ready
ADC CLK
Normal/system clock
Code dwell enable
PLL decrement
Kicker
PLL Z
Software state [2]
PLL xReset
ADC power down
D optional
7:4
MUX to SCLK
1111 - 0000
3:0
MUX to Dopt
1111 - 0000
9.2.11. Digital Test MUX B
This register allows test signals to be routed to the indicated pins of the AMIS-53050. These signals can help in the development of an
application using the AMIS-53050. The test unlock register code must be written, then this test register is written and then the test
function will be enabled until either is changed or there is a reset of the AMIS-53050, even if the test unlock register code value is
changed.
Table 117: Digital Test MUX B - 0X4C [76]
Bit
Test Pin
Comment
1111
Encoder in
1110
Decoder in
1101
Sniff
0111
0110
0101
Cal done kicker
PLL in range
INT0
1100
Σ
output
0100
Transmit done
1011
RF PLL (reference
CLK)
Brown-out output
Receive done
TS CLK
Recovered clock
0011
Software state [1]
1010
1001
1000
1111
0010
0001
0000
0111
Xtal on
ADC done
xInterrupt
PA enable
PLL cal timer
overflow
PLL cal enable
xtal PD
Software state [0]
isStopMode
7:4
MUX to xINT
1111 - 0000
1110
Decoder out
0110
1101
1100
1011
1010
Encoder out
CDR enable
Baud clock (CDR out)
0101
0100
0011
0010
CRC failed
RX enable
NC
1001
1000
0001
0000
Watch dog reset
xBurst
3:0
MUX to xBurst
1111- 0000
102
AMI Semiconductor
– Jan. 07, M-20639-002
www.amis.com
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