參數(shù)資料
型號(hào)： AM79C961AVIW
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： TQFP-144
文件頁(yè)數(shù)： 119/206頁(yè)
文件大小： 1507K
代理商： AM79C961AVIW
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Am79C961A
119
of only receive packets that
match internal address match.
Enable Transmit Status Signal.
Indicates PCnet-ISA II controller
transmit activity.
0 disables the signal, 1 enables
the signal.
Enable Receive Polarity Signal.
Enables LED pin assertion when
receive polarity is correct on the
10BASE-T port. Clearing the bit
indicates this function is to be
ignored.
Enable Receive Status Signal.
Indicates receive activity on the
network.
0 disables the signal, 1 enables
the signal.
Enable Jabber Signal. Indicates
the PCnet-ISA II controller is jab-
bering on the network.
0 disables the signal, 1 enables
the signal.
Enable Collision Signal. Indi-
cates collision activity on the
network.
0 disables the signal, 1 enables
the signal.
4
XMT E
3
RVPOL E
2
RCV E
1
JAB E
0
COL E
ISACSR7: LED3 Status
Bit
Name
Description
ISACSR7 controls the function(s)
that the LED3 pin displays. Multi-
ple functions can be simulta-
neously enabled on this LED pin.
The LED display will indicate the
logical OR of the enabled func-
tions. ISACSR7 defaults to
Transmit Status (XMT) with pulse
stretcher enabled (PSE = 1) and
is fully programmable.
Indicates the current (non-
stretched) state of the func-
tion(s) generated. Read only.
Reserved locations. Read and
written as zero.
Magic Packet LED Enable.
When set, the LED output will be
asserted to indicate that a Magic
Packet has been received.
Full Duplex Link Status Enable.
Indicates the Full Duplex Link
Test Status. When this bit is set,
a value of ONE is passed to the
LEDOUT signal when the PC-
15
LEDOUT
14-10
RES
9
MP
8
FDLSE
net-ISA II is functioning in a link
pass state with Full Duplex capa-
bility. When the PCnet-ISA II is
not functioning in a link pass state
with Full Duplex capability, a val-
ue of ZERO is passed to the
LEDOUT signal.
When the 10BASE-T port is
active, a value of ONE is passed
to the LEDOUT signal whenever
the Link Test Function (described
in the T-MAU section) detects a
Link Pass state and the FDEN
(ISACSR9, bit 0) bit is set. When
the AUI port is active, a value of
ONE is passed to the LEDOUT
signal whenever Full Duplex oper-
ation on the AUI port is enabled
(both FDEN and AUIFD bits in
ISACSR9 are set to ONE). When
the GPSI port is active, a value of
ONE is passed to the LEDOUT
signal whenever Full Duplex oper-
ation on the GPSI port is enabled
(FDEN bit in ISACSR9 is set to
ONE).
Pulse Stretcher Enable. Extends
the LED illumination for each
enabled function occurrence.
0 is disabled, 1 is enabled.
Reserved locations. Read and
written as zero.
Receive Address Match. This bit
when set allows for LED control
of only receive packets that
match internal address match.
Enable Transmit Status Signal.
Indicates PCnet-ISA II controller
transmit activity.
0 disables the signal, 1 enables
the signal.
Enable Receive Polarity Signal.
Enables LED pin assertion when
receive polarity is correct on the
10BASE-T port. Clearing the bit
indicates this function is to be
ignored.
Enable Receive Status Signal.
Indicates receive activity on the
network.
0 disables the signal, 1 enables
the signal.
Enable Jabber Signal. Indicates
the PCnet-ISA II controller is jab-
bering on the network.
0 disables the signal, 1 enables
the signal.
7
PSE
6
RES
5
RCVADDM
4
XMT E
3
RVPOL E
2
RCV E
1
JAB E
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參數(shù)描述
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