參數(shù)資料
型號： ADV7322
廠商： Analog Devices, Inc.
英文描述： Multiformat 11-Bit HDTV Video Encoder
中文描述： 多格式11位高清晰度電視視頻編碼器
文件頁數(shù)： 80/88頁
文件大小： 991K
代理商： ADV7322
ADV7322
Preliminary Technical Data
MODE 3—MASTER/SLAVE OPTION
(TIMING REGISTER 0 TR0 = X X X X X 1 1 0 OR
X X X X X 1 1 1)
In this mode, the ADV7322 accepts or generates horizontal sync
and odd/even field signals. When HSYNC is high, a transition
of the field input indicates a new frame, i.e., vertical retrace. The
BLANK signal is optional. When the BLANK input is disabled,
ADV7322 automatically blanks all normally blank lines as per
CCIR-624. HSYNC is output in master mode and input in slave
mode on S_VSYNC, BLANK on S_BLANK, andVSYNC on
S_VSYNC.
Rev. PrA | Page 80 of 88
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ODD FIELD
EVEN FIELD
DISPLAY
DISPLAY
VERTICAL BLANK
522
523
524
525
9
10
11
20
21
22
DISPLAY
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
HSYNC
BLANK
FIELD
0
HSYNC
BLANK
FIELD
8
7
6
5
4
3
2
1
Figure 119. SD Timing Mode 3 (NTSC)
622
623
624
625
5
6
21
22
23
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
334
335
336
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
320
4
3
2
1
7
HSYNC
BLANK
HSYNC
BLANK
0
Figure 120. SD Timing Mode 3 (PAL)
相關(guān)PDF資料
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