參數(shù)資料
型號: ADV7322
廠商: Analog Devices, Inc.
英文描述: Multiformat 11-Bit HDTV Video Encoder
中文描述: 多格式11位高清晰度電視視頻編碼器
文件頁數(shù): 65/88頁
文件大?。?/td> 991K
代理商: ADV7322
Preliminary Technical Data
ADV7322
APPENDIX 1—COPY GENERATION MANAGEMENT SYSTEM
PS CGMS
Data Registers 2 to 0
[Subaddresses 0x21, 0x22, 0x23]
Rev. PrA | Page 65 of 88
525p
Using the vertical blanking interval 525p system, 525p CGMS
conforms to the CGMS-A EIA-J CPR1204-1 (March 1998)
transfer method of video identification information and to the
IEC61880 (1998) 525p/60 video system’s analog interface for the
video and accompanying data.
When PS CGMS is enabled [Subaddress 0x12, Bit 6 = 1], CGMS
data is inserted on Line 41. The 525p CGMS data registers are at
Addresses 0x21, 0x22, and 0x23.
625p
The 625p CGMS conforms to the IEC62375 (2004) 625p/50
video system’s analog interface for the video and accompanying
data using the vertical blanking interval.
When PS CGMS is enabled [Subaddress 0x12, Bit 6 = 1], CGMS
data is inserted on Line 43. The 625p CGMS data registers are at
Addresses 0x22, and 0x23.
HD CGMS
[Address 0x12, Bit 6]
The ADV7322 supports Copy Generation Management System
(CGMS) in HDTV mode (720p and 1080i) in accordance with
EIAJ CPR-1204-2.
The HD CGMS data registers are found at Addresses 0x021,
0x22, and 0x23.
SD CGMS
Data Registers 2 to 0
[Subaddresses 0x59, 0x5A, 0x5B]
The ADV7322 supports Copy Generation Management System
(CGMS), conforming to the standard. CGMS data is
transmitted on Line 20 of the odd fields and Line 283 of even
fields. Bits C/W05 and C/W06 control whether CGMS data is
output on odd and even fields. CGMS data can be transmitted
only when the ADV7322 is configured in NTSC mode. The
CGMS data is 20 bits long, and the function of each of these bits
is as shown in the following table. The CGMS data is preceded
by a reference pulse of the same amplitude and duration as a
CGMS bit; see Figure 93.
FUNCTION OF CGMS BITS
For Word 0 to 6 bits, Word 1 to 4 bits, and Word 2 to 6 bits CRC
6 bits,
1
6
+
+
=
x
x
Polynomial
CRC
where default is preset to 111111.
720p System
CGMS data is applied to Line 24 of the luminance vertical
blanking interval.
1080i System
CGMS data is applied to Line 19 and Line 582 of the luminance
vertical blanking interval.
CGMS FUNCTIONALITY
If SD CGMS CRC [Address 0x59, Bit 4] or PS/HD CGMS CRC
[Subaddress 0x12, Bit 7] is set to Logic 1, the last six bits, C19 to
C14, which comprise the 6-bit CRC check sequence, are
calculated automatically on the ADV7322 based on the lower
14 bits (C0 to C13) of the data in the data registers and output
with the remaining 14 bits to form the complete 20 bits of the
CGMS data. The calculation of the CRC sequence is based on
the polynomial ×6 + x + 1 with a preset value of 111111. If SD
CGMS CRC [Address 0x59, Bit 4] and PS/HD CGMS CRC
[Address 0x12, Bit 7] are set to Logic 0, all 20 bits (C0 to C19)
are output directly from the CGMS registers (no CRC is
calculated, must be calculated by the user).
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