參數(shù)資料
型號: ADV7322
廠商: Analog Devices, Inc.
英文描述: Multiformat 11-Bit HDTV Video Encoder
中文描述: 多格式11位高清晰度電視視頻編碼器
文件頁數(shù): 77/88頁
文件大?。?/td> 991K
代理商: ADV7322
Preliminary Technical Data
ADV7322
MODE 1—MASTER OPTION
(TIMING REGISTER 0 TR0 = X X X X X 0 1 1)
In this mode, the ADV7322 can generate horizontal sync and
odd/even field signals. When HSYNC is low, a transition of the
field input indicates a new frame, i.e., vertical retrace. The blank
signal is optional. When the BLANK input is disabled,
ADV7322 automatically blanks all normally blank lines as per
CCIR-624. Pixel data is latched on the rising clock edge
following the timing signal transitions. HSYNC is output on the
S_HSYNC, BLANK on S_BLANK, and FIELD on S_VSYNC.
Rev. PrA | Page 77 of 88
622
623
624
625
21
22
23
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
334
335
336
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
DISPLAY
320
FIELD
5
7
6
4
3
2
1
HSYNC
BLANK
HSYNC
BLANK
0
Figure 113. SD Slave Mode 1 (PAL)
FIELD
PIXEL
DATA
PAL = 12
×
CLOCK/2
NTSC = 16
×
CLOCK/2
Cb
Y
Cr
Y
HSYNC
BLANK
PAL = 132
×
CLOCK/2
NTSC = 122
×
CLOCK/2
0
Figure 114. SD Timing Mode 1—Odd/Even Field Transitions Master/Slave
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