參數(shù)資料
型號(hào)： ADV7322
廠商： Analog Devices, Inc.
英文描述： Multiformat 11-Bit HDTV Video Encoder
中文描述： 多格式11位高清晰度電視視頻編碼器
文件頁(yè)數(shù)： 46/88頁(yè)
文件大?。?/td> 991K
代理商： ADV7322
ADV7322
Preliminary Technical Data
RESET SEQUENCE
A reset is activated with a high-to-low transition on the RESET
pin [Pin 33] according to the timing specifications. The
ADV7322 will revert to the default output configuration. Figure 62
illustrates the RESET timing sequence.
Rev. PrA | Page 46 of 88
SD VCR FF/RW SYNC
[Subaddress 0x42, Bit 5]
In DVD record applications where the encoder is used with a
decoder, the VCR FF/RW sync control bit can be used for
nonstandard input video, i.e., in fast forward or rewind modes.
In fast forward mode, the sync information at the start of a new
field in the incoming video usually occurs before the correct
number of lines/fields is reached; in rewind mode, this sync
signal usually occurs after the total number of lines/fields is
reached. Conventionally this means that the output video will
have corrupted field signals, one generated by the incoming
video and one generated when the internal lines/field counters
reach the end of a field.
When the VCR FF/RW sync control is enabled [Subaddress
0x42, Bit 5], the lines/fields counters are updated according to
the incoming VSYNC signal, and the analog output matches the
incoming VSYNC signal.
This control is available in all slave timing modes except Slave
Mode 0.
XXXXXX
XXXXXX
OFF
DIGITAL TIMING SIGNALS SUPPRESSED
VALID VIDEO
TIMING ACTIVE
RESET
DIGITAL TIMING
DACs
A, B, C
PIXEL DATA
VALID
0
Figure 62. RESET Timing Sequence
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