參數(shù)資料
型號： ADV7322
廠商： Analog Devices, Inc.
英文描述： Multiformat 11-Bit HDTV Video Encoder
中文描述： 多格式11位高清晰度電視視頻編碼器
文件頁數(shù)： 79/88頁
文件大?。?/td> 991K
代理商： ADV7322
Preliminary Technical Data
ADV7322
MODE 2—MASTER OPTION
(TIMING REGISTER 0 TR0 = X X X X X 1 0 1)
In this mode, the ADV7322 can generate horizontal and vertical
sync signals. A coincident low transition of both HSYNC and
VSYNC inputs indicates the start of an odd field.
Rev. PrA | Page 79 of 88
A VSYNC low transition when HSYNC is high indicates the
start of an even field. The BLANK signal is optional. When the
BLANK input is disabled, the ADV7322 automatically blanks all
normally blank lines as per CCIR-624. HSYNC is output on
S_HSYNC , BLANK on S_BLANK, and VSYNC on S_VSYNC.
Cb
Y
0
PIXEL
DATA
HSYNC
BLANK
VSYNC
PAL = 12
×
CLOCK/2
NTSC = 16
×
CLOCK/2
PAL = 132
×
CLOCK/2
NTSC = 122
×
CLOCK/2
Y
Cr
Figure 117. SD Timing Mode 2 Even-to-Odd Field Transition Master/Slave
Cb
PIXEL
DATA
HSYNC
BLANK
VSYNC
PAL = 12
×
CLOCK/2
NTSC = 16
×
CLOCK/2
PAL = 132
×
CLOCK/2
NTSC = 122
×
CLOCK/2
PAL = 864
×
CLOCK/2
NTSC = 858
×
CLOCK/2
Cb
Y
Y
Cr
0
Figure 118. SD Timing Mode 2 Odd-to-Even Field Transition
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