- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375269 > ADV7322 (Analog Devices, Inc.) Multiformat 11-Bit HDTV Video Encoder PDF資料下載
參數(shù)資料
| 型號： | ADV7322 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 11-Bit HDTV Video Encoder |
| 中文描述： | 多格式11位高清晰度電視視頻編碼器 |
| 文件頁數(shù)： | 58/88頁 |
| 文件大小： | 991K |
| 代理商： | ADV7322 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁當前第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
ADV7322
Preliminary Technical Data
Adaptive Filter Control Application
Figure 74 and Figure 75 show typical signals to be processed by
the adaptive filter control block.
Rev. PrA | Page 58 of 88
: 692mV
@: 446mV
: 332ns
@: 12.8ms
0
Figure 74. Input Signal to Adaptive Filter Control
: 692mV
@: 446mV
: 332ns
@: 12.8ms
0
Figure 75. Output Signal after Adaptive Filter Control
The register settings in Table 35 were used to obtain the results
shown in Figure 75, i.e., to remove the ringing on the Y signal.
Input data was generated by an external signal source.
Table 35. Register Settings for Figure 76
Address
Register Setting
0x00
0xFC
0x01
0x38
0x02
0x20
0x10
0x00
0x11
0x81
0x15
0x80
0x20
0x00
0x38
0xAC
0x39
0x9A
0x3A
0x88
0x3B
0x28
0x3C
0x3F
0x3D
0x64
When changing the adaptive filter mode to Mode B
[Address 0x15, Bit 6], the output shown in Figure 76 can be
obtained.
: 674mV
@: 446mV
: 332ns
@: 12.8ms
0
Figure 76. Output Signal from Adaptive Filter Control
SD DIGITAL NOISE REDUCTION
[Subaddresses 0x63, 0x64, 0x65]
DNR is applied to the Y data only. A filter block selects the high
frequency, low amplitude components of the incoming signal
[DNR input select]. The absolute value of the filter output is
compared to a programmable threshold value ['DNR threshold
control]. There are two DNR modes available: DNR mode and
DNR sharpness mode.
In DNR mode, if the absolute value of the filter output is
smaller than the threshold, it is assumed to be noise. A
programmable amount [coring gain border, coring gain data] of
this noise signal will be subtracted from the original signal. In
DNR sharpness mode, if the absolute value of the filter output is
less than the programmed threshold, it is assumed to be noise,
as before. Otherwise, if the level exceeds the threshold, now
being identified as a valid signal, a fraction of the signal [coring
gain border, coring gain data] will be added to the original
signal to boost high frequency components and sharpen the
video image.
In MPEG systems, it is common to process the video
information in blocks of 8 pixels × 8 pixels for MPEG2 systems,
or 16 pixels × 16 pixels for MPEG1 systems [block size control].
DNR can be applied to the resulting block transition areas that
are known to contain noise. Generally, the block transition area
contains two pixels. It is possible to define this area to contain
four pixels [border area].
It is also possible to compensate for variable block positioning
or differences in YCrCb pixel timing with the use of the DNR
block offset
The digital noise reduction registers are three 8-bit registers.
They are used to control the DNR processing.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7322KSTZ1 | Multiformat 11-Bit HDTV Video Encoder |
| ADV7400 | ADV7402/ADV7400 Multiformat Video Decoders for Advanced TV |
| ADV7400KST-110 | ADV7402/ADV7400 Multiformat Video Decoders for Advanced TV |
| ADV7400KST-140 | ADV7402/ADV7400 Multiformat Video Decoders for Advanced TV |
| ADV7400KST-80 | ADV7402/ADV7400 Multiformat Video Decoders for Advanced TV |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV73225709 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73225710 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73225718 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73225719 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73225801 | 制造商:LG Corporation 功能描述:Frame Assembly |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。