- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄294846 > ADV7152 (Analog Devices, Inc.) CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC(三通道,10位視頻RAM-D/A轉(zhuǎn)換器) PDF資料下載
參數(shù)資料
| 型號： | ADV7152 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC(三通道,10位視頻RAM-D/A轉(zhuǎn)換器) |
| 中文描述： | 220兆赫的CMOS真彩色圖形三路10位顯存，數(shù)模轉(zhuǎn)換器（三通道，10位視頻RAM的的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 4/32頁 |
| 文件大?。?/td> | 322K |
| 代理商： | ADV7152 |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
ADV7152
–12–
REV. B
Alternatively, the ADV7152 CLOCK inputs can be driven by a
Programmable Clock Generator (Figure 13), such as the
ICS1562. The ICS1562 is a monolithic, phase-locked-loop,
clock generator chip. It is capable of synthesizing differential
ECL output frequencies in a range up to 220 MHz from a single
low frequency reference crystal.
V
CC
GND
220
330
GND
+5V
CLOCK
GND
V
AA
ADV7152
GND
D0–D3
CS R/W
ECL
OUT+
V
REF OUT
V
REF
+5V
V
CLOCK
V
AA
0.1
F
LOW FREQUENCY
OSCILLATOR
V
CC
GND
220
330
ECL
OUT–
CLOCK
GENERATOR
Figure 13. PLL Generator Driving CLOCK, CLOCK of the
ADV7152
CLOCK CONTROL SIGNALS LOADOUT
The ADV7152 generates a LOADOUT control signal which
runs at a divided down frequency of the pixel CLOCK. The
frequency is automatically set to the programmed multiplex
rate, controlled by CR36 of Command Register 3.
fLOADOUT = fCLOCK/2
2:1 Multiplex Mode
fLOADOUT = fCLOCK
1:1 Multiplex Mode
The LOADOUT signal is used to directly drive the LOADIN
pixel latch signal of the ADV7152. This is most simply achieved
by tying the LOADOUT and LOADIN pins together. Alterna-
tively, the LOADOUT signal can be used to drive the frame
buffer’s shift clock signals, returning to the LOADIN input de-
layed with respect to LOADOUT.
LOADOUT
LOADIN
ADV7152
VIDEO
FRAME
BUFFER
LOADOUT
LOADIN
ADV7152
VIDEO
FRAME
BUFFER
LOADOUT(1)
LOADOUT(2)
PIXEL
DATA
PIXEL
DATA
LOADOUT(1)
LOADIN
LOADOUT(2)
LOADOUT
DELAY
Figure 14. LOADOUT vs. Pixel Clock Input (CLOCK, CLOCK)
If it is not necessary to have a known fixed number of pipeline
delays, then there is no limitation on the delay between LOAD-
OUT and LOADIN (LOADOUT(1) and LOADOUT(2)).
LOADIN and Pixel Data must conform to the setup and hold
times (t8 and t9).
If, however, it is required that the ADV7152 has a fixed number
of pipeline delays (tPD), LOADOUT and LOADIN must con-
form to timing specifications t10 and
τ-t
11 as illustrated in Fig-
ures 4 and 5.
PRGCKOUT
The PRGCKOUT control signal outputs a user programmable
clock frequency. It is a divided down frequency of the pixel
CLOCK (see Figure 8). The rising edge of PRGCKOUT is
synchronous to the rising edge of LOADOUT
fPRGCKOUT = f CLOCK/N
where N = 4, 8, 16 or 32.
One application of the PRGCKOUT is to use it as the master
clock frequency of the graphics subsystems processor or
controller.
SCKIN, SCKOUT
These video memory signals are used to minimize external sup-
port chips. Figure 15 illustrates the function that is provided.
An input signal applied to SCKIN is synchronously AND-ed
with the video blanking signal (
BLANK). The resulting signal is
output on SCKOUT. Figure 7 of the Timing Waveform section
shows the relationship between SCKOUT, SCKIN and
BLANK.
SCKOUT
SCKIN
BLANK
LATCH
ENABLE
SYNC
Figure 15. SCKOUT Generation Circuit
The SCKOUT signal is essentially the video memory shift con-
trol signal. It is stopped during the screen retrace. Figure 16
shows a suggested frame buffer to ADV7152 interface. This is a
minimum chip solution and allows the ADV7152 control the
overall graphics system clocking and synchronization.
LOADOUT
SCKOUT
ADV7152
VIDEO
FRAME
BUFFER
PIXEL
DATA
LOADIN
SCKIN
BLANK
Figure 16. ADV7152 Interface Using SCKIN and SCKOUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AE101SD1CQ | TOGGLE SWITCH, SPDT, LATCHED, 2A, 30VDC, THROUGH HOLE-STRAIGHT |
| AE105E11A35SD | 13 CONTACT(S), ALUMINUM ALLOY, FEMALE, MIL SERIES CONNECTOR, CRIMP, RECEPTACLE |
| AE105E11A35S | 13 CONTACT(S), ALUMINUM ALLOY, FEMALE, MIL SERIES CONNECTOR, CRIMP, RECEPTACLE |
| AE105E11A4PA | 4 CONTACT(S), ALUMINUM ALLOY, MALE, MIL SERIES CONNECTOR, CRIMP, RECEPTACLE |
| AE105E11A4PB | 4 CONTACT(S), ALUMINUM ALLOY, MALE, MIL SERIES CONNECTOR, CRIMP, RECEPTACLE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| adv7152es | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| ADV7152KS110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7152KS135 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7152KS170 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7152KS85 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。