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參數(shù)資料
| 型號： | ADV7152 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC(三通道,10位視頻RAM-D/A轉(zhuǎn)換器) |
| 中文描述： | 220兆赫的CMOS真彩色圖形三路10位顯存，數(shù)模轉(zhuǎn)換器（三通道，10位視頻RAM的的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 322K |
| 代理商： | ADV7152 |
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ADV7152
–28–
REV. B
APPENDIX 5
INITIALIZATION AND PROGRAMMING
ADV7152 Initialization
After power has been supplied, the ADV7152 must be initial-
ized. The Mode Register and Control Registers must be set.
The values written to the various registers will be determined by
the desired operating mode of the part, i.e., True Color/Pseudo
Color, 2:1 Muxing/2:1 Muxing, etc.
The following section gives examples of initialization of the
ADV7152 operating in various modes.
Example 1
Color Mode
24-Bit True Color
Multiplexing
2:1
Databus
8-Bit
RAM-DAC Resolution
8-Bit
SYNC
Enabled on IOG
Pedestal
7.5 IRE
Register Initialization
C1
C0
R/
W
Comment
Write
09H to Mode Register (MR1)
1
0
Resets to Normal Operation, 8-Bit Bus/RAM-DAC
Write
08H to Mode Register (MR1)
1
0
*(Initializes Pipelining
Write
09H to Mode Register (MR1)
1
0
*( “
Write
29H to Mode Register (MR1)
1
0
*(Calibrates LOADOUT/LOADIN Timing
Write
09H to Mode Register (MR1)
1
0
*( “
Write
04H to Address Register (A7–A0)
0
Address Reg Points to Pixel Mask Register
Write
FFH to Pixel Mask Register
1
0
Sets the Pixel Mask to All “1s”
Write
05H to Address Register (A7–A0)
0
Address Reg Points to Command Register 1 (CR1)
Write
00H to Command Reg 1 (CR1)
1
0
Write
06H to Address Register (A7–A0)
0
Address Reg Points to Command Register 2 (CR2)
Write
ECH to Command Reg 2 (CR2)
1
0
Sets 24-Bit Color, 7.5 IRE,
SYNC on Green (IOG)
Write
07H to Address Register (A7–A0)
0
Address Reg Points to Command Register 3 (CR3)
Write
40H to Command Reg 3 (CR3)
1
0
Sets 2:1 Multiplexing, PRGCKOUT = CLOCK/4
Color Palette RAM Initialization
C1
C0
R/
W
Comment
Write
00H to Address Register (A7–A0)
0
Points to Color Palette RAM
Write
00H (Red Data) to RAM Location (00H)
0
1
0
(Initializes Palette RAM
Write
00H (Green Data) to RAM Location (00H)
0
1
0
(
to a Linear Ramp**
Write
00H (Blue Data) to RAM Location (00H)
0
1
0
(
Write
01H (Red Data) to RAM Location (01H)
0
1
0
(
Write
01H (Green Data) to RAM Location (01H)
0
1
0
(
Write
01H (Blue Data) to RAM Location (01H)
0
1
0
(
(
(
Write
FFH (Red Data) to RAM Location (FFH)
0
1
0
(
Write
FFH (Green Data) to RAM Location (FFH)
0
1
0
(
Write
FFH (Blue Data) to RAM Location (FFH)
0
1
0
(RAM Initialization Complete
**These four command lines reset the ADV7152. The pipelines for each of the Red, Creen and Blue pixel inputs are synchronously reset to the Multiplexer’s
“A” input. Mode Register bit MR10 is written by a “1” followed by “0” followed by “1.” LOADIN/LOADOUT timing is internally synchronized by writing a “0”
followed by a “1” followed by a “0” to Mode Register MR15.
**This sequence of instructions would, of course, normally be coded using some form of loop instruction.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| adv7152es | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| ADV7152KS110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7152KS135 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7152KS170 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7152KS85 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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