參數(shù)資料
型號(hào): ADV7152
廠商: Analog Devices, Inc.
英文描述: CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC(三通道,10位視頻RAM-D/A轉(zhuǎn)換器)
中文描述: 220兆赫的CMOS真彩色圖形三路10位顯存,數(shù)模轉(zhuǎn)換器(三通道,10位視頻RAM的的D / A轉(zhuǎn)換器)
文件頁(yè)數(shù): 14/32頁(yè)
文件大小: 322K
代理商: ADV7152
ADV7152
–21–
REV. B
COMMAND REGISTER 3 (CR3)
(Address Reg (A7–A0) = 07H)
This register contains a number of control bits as shown in the
diagram. CR3 is a 10-bit wide register. However, for program-
ming purposes it may be considered as an 8-bit wide register
(CR38 and CR39 are both reserved).
The diagram shows the various operations under the control of
CR3. This register can be read from as well written to. In read
mode, CR38 and CR39 are both returned as zeros.
COMMAND REGISTER 3-BIT DESCRIPTION
PRGCKOUT Frequency Control (CR31–CR30)
These bits specify the output frequency of the PRGCKOUT
output. PRGCKOUT is a divided down version of the pixel
CLOCK.
BLANK Pipeline Delay Control (CR35–CR32)
These bits specify the additional pipeline delay that can be
added to the
BLANK function relative to the overall device
pipeline delay (tPD). As the BLANK control normally enters the
video DAC from a shorter pipeline than the video pixel data,
this control is useful in deskewing the pipeline differential.
Pixel Multiplex Control (CR36)
These bits specify the device’s multiplex mode. Therefore,
they also determine the frequency of the LOADOUT signal.
LOADOUT is a divided down version of the pixel CLOCK.
Revision Register
(Address Reg (A7–A0) = 0BH)
This register is a read only register containing the revision of
silicon.
RESERVED*
CR39
CR38
CR37
CR36
CR35
CR34
CR32
CR31
CR30
CR33
* THESE BITS ARE READ-ONLY
RESERVED BITS.
A READ CYCLE WILL RETURN
ZEROS "00".
CR37 CR36
0
1:1 MUXING: LOADOUT = CLOCK
÷1
0
1
2:1 MUXING: LOADOUT = CLOCK
÷2
1
0
RESERVED
1
RESERVED
PIXEL MULTIPLEX CONTROL
tPD
+ 1 x LOADOUT
tPD
+ 2 x LOADOUT
tPD
+ 15 x LOADOUT
EXTRA BLANK PIPELINE DELAY CONTROL
(ADDS TO PIXEL PIPELINE DELAY;
tPD)
CR35 CR34 CR33 CR32
BLANK PIPELINE DELAY
0
1
0
1
0
1
1
0
1
0
1
CR31 CR30
0
CLOCK
÷4
0
1
CLOCK
÷8
1
0
CLOCK
÷16
1
CLOCK
÷32
PRGCKOUT
FREQUENCY CONTROL
Command Register 3 (CR3) (CR39–CR30)
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