參數(shù)資料
型號： ADUC7032BSTZ-8V-RL
廠商： Analog Devices Inc
文件頁數(shù)： 78/128頁
文件大?。?/td> 0K
描述： IC BATTERY SENSOR PREC 48-LQFP
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 標準包裝
其它名稱： ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 53 of 128
3 - 0
Current Channel ADC Gain Select (note, nominal I-ADC Full-scale Input Voltage = (Vref/GAIN)
0, 0, 0, 0
I-ADC Gain =1
0, 0, 0, 1
I-ADC Gain =2
0, 0, 1, 0
I-ADC Gain =4
0, 0, 1, 1
I-ADC Gain =8
0, 1, 0, 0
I-ADC Gain =16
0, 1, 0, 1
I-ADC Gain =32
0, 1, 1, 0
I-ADC Gain =64
0, 1, 1, 1
I-ADC Gain =128
1, 0, 0, 0
I-ADC Gain =256
1, 0, 0, 1
I-ADC Gain =512
1, x, x, x
I-ADC Gain is undefined
Voltage Channel ADC Control Register :
Name :
ADC1CON
Address :
0xFFFF0510
Default Value :
0x0000
Access :
Read/Write
Function :
The Voltage Channel ADC Control MMR is an 16-bit register that is used to configure the V-ADC.
Note:
When enabling/disabling the Voltage ADC, the Voltage Attenuator must also be enabled/disabled via HVCFG1[7].
Table 25 : ADC1CON MMR Bit Designations
Bit
Description
15
Voltage Channel ADC Enable
This bit is set to 1 by user code to enable the V-ADC.
When enabling/disabling the Voltage ADC, the Voltage Attenuator
must also be enabled/disabled via HVCFG1[7].
Clearing this bit to 0, powers down the V-ADC.
14– 10
Not Used
These bits are reserved for future functionality and should not be modified by user code
9
Voltage Channel ADC Output Coding
This bit is set to 1 by user code to configure V-ADC output coding as unipolar
This bit is cleared to 0 by user code to configure V-ADC output coding as 2’s compliment
8
Not Used
This bit is reserved for future functionality and should be written as 0 by user code
7, 6
Voltage Channel ADC Input Select
0, 0
VBAT/24, AGND
VBAT attenuator selected
0, 1
Not Defined
1, 0
Not Defined
1, 1
Internal Short
Shorted Input
5, 4
Voltage Channel ADC Reference Select
0, 0
Internal, 1.2V precision reference selected.
0, 1
External reference inputs (VREF, GND_SW) selected.
1, 0
External reference inputs divided by 2 (VREF, GND_SW)/2 selected. This allows an external reference up to
REG_AVDD
1, 1
(REG_AVDD, AGND) divided by 2 selected.
3 – 0
Not Used
These bits are reserved for future functionality and should be written as 0 by user code
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