參數(shù)資料
型號: ADUC7032BSTZ-8V-RL
廠商: Analog Devices Inc
文件頁數(shù): 114/128頁
文件大?。?/td> 0K
描述: IC BATTERY SENSOR PREC 48-LQFP
標準包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 96KB(48K x 16)
程序存儲器類型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉換器: A/D 2x16b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 標準包裝
其它名稱: ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 86 of 128
GENERAL PURPOSE I/O
The ADuC7032 features 9 General Purpose bi-directional I/O
pins (GPIO). In general, many of the GPIO pins have multiple
functions which can be configured by user code. By default, the
GPIO pins are configured in GPIO mode. All GPIO pins have
an internal pull up resistor and their sink capability is 0.8mA
and they can source 0.1mA.
The 9 GPIO are grouped into three ports, Port0, Port1 and
Port2. Port0 is 5 bits wide. Port1 and Port2 are both 2 bits wide.
The GPIO assignment within each port is detailed in Table 48.
A typical GPIO structure is shown Figure 34.
External Interrupts are present on GP0, GP5, GP7 and GP8.
This interrupts are level triggered and are active high. These
interrupts are not latched, therefore the interrupts source must
be present until either IRQSTA or FIQSTA are interrogated.
The Interrupt source must be active for at least 1 CD divided
core clock to guarantee recognition.
All port pins are configured and controlled by 4 sets (1 set for
each port) of four port specific MMRs:
GPxCON:
Port x Control Register
GPxDAT:
Port x Configuration and Data Register
GPxSET:
Data set port x
GPxCLR:
Data clear port x
where x corresponds to the port number 0,1 or 2
During normal operation, user code can control the function
and state of the external GPIO pins via these general purpose
registers. All GPIO pins will retain their external (high or low)
during power-down (POWCON) mode.
05
99
4-
03
5
1ONLY AVAILABLE ON GP0, GP5, GP7, AND GP8.
GPIO
REG_DVDD
OUTPUT DRIVE ENABLE
GPxDAT[31:24]
OUTPUT DATA
GPxDAT[23:16]
INPUT DATA
GPxDAT[7:0]
GPIO IRQ1
Figure 34 : ADuC7032 GPIO
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