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參數(shù)資料
| 型號： | ADSP-TS202S |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | TigerSHARC Embedded Processor |
| 中文描述： | TigerSHARC系列嵌入式處理器 |
| 文件頁數(shù)： | 20/40頁 |
| 文件大?。?/td> | 615K |
| 代理商： | ADSP-TS202S |
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Rev. PrB
|
Page 20 of 40
|
December 2003
ADSP-TS202S
Preliminary Technical Data
When default configuration is used, no external resistor is
needed on the strap pins. To apply other configurations, a 500
resistor connected to V
DD_IO
is required. If providing external
pulldowns, do not strap these pins directly to V
SS
; the strap pins
require 500
resistor straps.
All strap pins are sampled on the rising edge of RST_IN (de-
assertion edge). Each pin latches the strapped pin state (state of
the strap pin at the rising edge of RST_IN). Shortly after de-
assertion of RST_IN, these pins are re-configured to their nor-
mal functionality.
These strap pins have an internal pull-down resistor, pull-up
resistor, or no-resistor (three-state) on each pin. The resistor
type, which is connected to the I/O pad, depends on whether
RST_IN is active (low) or if RST_IN is de-asserted (high).
Table 16
shows the resistors that are enabled during active reset
and during normal operation
SYS_REG_WE
I
(pd_0)
BUSLOCK
SYSCON and SDRCON Write Enable.
0 = one-time writable after reset (default)
1 = always writable
Test Mode 1. Do not overdrive default value during reset.
TM1
I
(pu)
I
(pu)
I
(pu)
L1BCMPO
TM2
L2BCMPO
Test Mode 2. Do not overdrive default value during reset.
TM3
L3BCMPO
Test Mode 3. Do not overdrive default value during reset.
Table 15. Pin Definitions—I/O Strap Pins (Continued)
Signal
Type (at
Reset)
On Pin…
Description
I
= input;
A
= asynchronous;
O
= output;
OD
= open drain output;
T
= Three-State;
P
= power supply;
G
= ground;
pd
= internal pulldown 5 k
;
pu
= internal pullup 5 k
;
pd_0
= internal pulldown 5 k
on DSP ID=0;
pu_0
= internal pullup 5 k
on DSP
ID=0;
pu_od_0
= internal pullup 500
on DSP ID=0;
pd_m
= internal pulldown 5 k
on DSP bus master;
pu_m
= internal pullup 5 k
on DSP
bus master;
pu_ad
= internal pullup 40 k
; For more pulldown and pullup information, see
Electrical Characteristics on page 21
.
Table 16. Strap Pin Internal Resistors—Active Reset
(RST_IN = 0) Versus Normal Operation (RST_IN = 1)
PIN
BMS
BM
TMR0E
BUSLOCK
L1BCMPO
L2BCMPO
L3BCMPO
pd
= internal pulldown 5 k
;
pu
= internal pullup 5 k
;
pd_0
=
internal pulldown 5 k
on DSP ID=0;
pu_0
= internal pullup 5 k
on DSP ID=0
RST_IN = 0
(pd_0)
(pd)
(pd)
(pd_0)
(pu)
(pu)
(pu)
RST_IN = 1
(pu_0)
Driven
Driven
(pu_0)
Driven
Driven
Driven
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| ADSP-TS202SABPZ050 | 功能描述:IC PROCESSOR 500MHZ 576BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TigerSHARC® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-TS203SABP-050 | 功能描述:IC DSP FLOAT/FIXED 500MHZ 576BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TigerSHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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