參數(shù)資料
型號(hào): AD9522-1/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 69/84頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9522-1 CLK GEN
設(shè)計(jì)資源: AD9522 Eval Board Schematic
AD9522 BOM
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),時(shí)鐘發(fā)生器
嵌入式:
已用 IC / 零件: AD9522-1
主要屬性: 12 LVDS/24 CMOS 輸出,2.4 GHz VCO
次要屬性: I²C & SPI 接口
已供物品:
AD9522-1
Rev. 0 | Page 71 of 84
Reg.
Addr
(Hex) Bit(s) Name
Description
[5]
[4]
[3]
[2]
[1]
[0]
Level or
Dynamic
Signal
Signal at LD Pin
1
0
1
0
DYN
REF2 clock (not available in differential mode).
1
0
1
DYN
Selected reference to PLL (differential reference when in
differential mode).
1
0
1
0
DYN
Unselected reference to PLL (not available when in differential
mode).
1
0
1
0
1
LVL
Status of selected reference (status of differential reference);
active low.
1
0
1
0
LVL
Status of unselected reference (not available in differential
mode); active low.
1
0
1
LVL
Status of REF1 frequency (active low).
1
0
LVL
Status of REF2 frequency (active low).
1
0
1
LVL
(Status of REF1 frequency) AND (status of REF2 frequency).
1
0
1
0
LVL
(DLD) AND (Status of selected reference) AND (status of VCO).
1
0
1
LVL
Status of VCO frequency (active low).
1
0
LVL
Selected reference (low = REF2, high = REF1).
1
0
1
LVL
DLD; active low.
1
0
LVL
Holdover active (active low).
1
LVL
Not available, do not use.
01B
[7]
Enable VCO
frequency
monitor
Enables or disables the VCO frequency monitor.
[7] = 0; disable the VCO frequency monitor (default).
[7] = 1; enable the VCO frequency monitor.
01B
[6]
Enable REF2
(REFIN)
frequency
monitor
Enables or disables the REF2 frequency monitor.
[6] = 0; disable the REF2 (REFIN) frequency monitor (default).
[6] = 1; enable the REF2 (REFIN) frequency monitor.
01B
[5]
Enable REF1
(REFIN)
frequency
monitor
REF1 (REFIN) frequency monitor enabled; this is for both REF1 (single-ended) and REFIN (differential) inputs
(as selected by differential reference mode).
[5] = 0; disable the REF1 (REFIN) frequency monitor (default).
[5] = 1; enable the REF1 (REFIN) frequency monitor.
01B
[4:0]
REFMON pin
control
Selects the signal that is connected to the REFMON pin.
[4]
[3]
[2]
[1]
[0]
Level or
Dynamic
Signal
Signal at REFMON Pin
0
LVL
Ground, dc (default).
0
1
DYN
REF1 clock (differential reference when in differential mode).
0
1
0
DYN
REF2 clock (not available in differential mode).
0
1
DYN
Selected reference to PLL (differential reference when in differential
mode).
0
1
0
DYN
Unselected reference to PLL (not available in differential mode).
0
1
0
1
LVL
Status of selected reference (status of differential reference);
active high.
0
1
0
LVL
Status of unselected reference (not available in differential mode);
active high.
0
1
LVL
Status REF1 frequency (active high).
0
1
0
LVL
Status REF2 frequency (active high).
0
1
0
1
LVL
(Status REF1 frequency) AND (status REF2 frequency).
0
1
0
1
0
LVL
(DLD) AND (status of selected reference) AND (status of VCO).
0
1
0
1
LVL
Status of VCO frequency (active high).
0
1
0
LVL
Selected reference (low = REF1, high = REF2).
0
1
0
1
LVL
DLD; active low.
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