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參數(shù)資料
| 型號(hào)： | ADCLK914/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADCLK914 |
| 設(shè)計(jì)資源： | ADCLK9xx Eval Brd Schematics ADCLK914 Gerber File ADCLK914 BOM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時(shí)，時(shí)鐘分配 |
| 已用 IC / 零件： | ADCLK914 |
| 已供物品： | 板 |
Ultrafast, SiGe, Open-Collector
HVDS Clock/Data Buffer
ADCLK914
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2008 Analog Devices, Inc. All rights reserved.
FEATURES
7.5 GHz operating frequency
160 ps propagation delay
100 ps output rise/fall
110 fs random jitter
On-chip input terminations
Extended industrial temperature range: 40°C to +125°C
3.3 V power supply (VCC VEE)
APPLICATIONS
Clock and data signal restoration
High speed converter clocking
Broadband communications
Cellular infrastructure
High speed line receivers
ATE and high performance instrumentation
Level shifting
Threshold detection
FUNCTIONAL BLOCK DIAGRAM
D
Q
VCC
VEE
VT
Q
D
Q
VCC
VEE
VT
Q
VREF
0656
1-
001
50
ADCLK914
Figure 1.
GENERAL DESCRIPTION
The ADCLK914 is an ultrafast clock/data buffer fabricated on
the Analog Devices, Inc., proprietary, complementary bipolar
(XFCB-3) silicon-germanium (SiGe) process. The ADCLK914
features high voltage differential signaling (HVDS) outputs
suitable for driving the latest Analog Devices high speed digital-
to-analog converters (DACs). The ADCLK914 has a single,
differential open-collector output.
The ADCLK914 buffer operates up to 7.5 GHz with a 160 ps
propagation delay and adds only 110 fs random jitter (RJ).
The input has a center tapped, 100 Ω, on-chip termination
resistor and accepts LVPECL, CML, CMOS, LVTTL, or LVDS
(ac-coupled only). A VREF pin is available for biasing ac-coupled
inputs.
The HVDS output stage is designed to directly drive 1.9 V each
side into 50 Ω terminated to VCC for a total differential output
swing of 3.8 V.
The ADCLK914 is available in a 16-lead LFCSP. It is specified
for operation over the extended industrial temperature range of
40°C to +125°C.
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參數(shù)描述 |
|---|---|
| ADCLK914XCPZ | 制造商:Analog Devices 功能描述:CLOCK AND TIMING IC - Rail/Tube |
| ADCLK925/PCBZ | 功能描述:BOARD EVAL FOR ADCLK925 16LFCSP RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱(chēng):82EBV2081 |
| ADCLK925BCPZ-R2 | 功能描述:IC CLOCK/DATA BUFFER 1:2 16LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:SIGe 標(biāo)準(zhǔn)包裝:74 系列:- 類(lèi)型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ADCLK925BCPZ-R7 | 功能描述:IC CLOCK/DATA BUFFER 1:2 16LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:SIGe 產(chǎn)品培訓(xùn)模塊:High Bandwidth Product Overview 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類(lèi)型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:4 差分 - 輸入:輸出:是/是 輸入:CML，LVDS，LVPECL 輸出:CML 頻率 - 最大:2.5GHz 電源電壓:2.375 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤(pán)，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) |
| ADCLK925BCPZ-TR | 制造商:Analog Devices 功能描述:1:2 ECL,,7 GBPPS CLOCK/DATA BUFFERS - Tape and Reel |
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