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參數(shù)資料
| 型號： | AD9516-5/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 40/76頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9516-5 2.5GHZ |
| 產(chǎn)品培訓(xùn)模塊： | Active Filter Design Tools |
| 設(shè)計資源： | AD9516 Eval Brd Schematic AD9516 Gerber Files AD9516-5 BOM |
| 標準包裝： | 1 |
| 主要目的： | 計時，時鐘發(fā)生器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9516-5 |
| 主要屬性： | 2 輸入，14 輸出 |
| 次要屬性： | CMOS、LVDS、LVPECL 輸出邏輯，ADIsimCLK&trade 圖形用戶界面 |
| 已供物品： | 板，線纜，CD，電源 |
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AD9516-5
Rev. A | Page 45 of 76
Read
If the instruction word is for a read operation, the next N × 8
SCLK cycles clock out the data from the address specified in the
instruction word, where N is 1 to 3, as determined by [W1:W0].
If N = 4, the read operation is in streaming mode, continuing
until CS is raised. Streaming mode does not skip over reserved
or blank registers. The readback data is valid on the falling
edge of SCLK.
The default mode of the AD9516 serial control port is the
bidirectional mode. In bidirectional mode, both the sent data
and the readback data appear on the SDIO pin. It is also possible to
set the AD9516 to unidirectional mode via the SDO active bit
(Register 0x000[0] = 1b). In unidirectional mode, the readback
data appears on the SDO pin.
A readback request reads the data that is in the serial control
port buffer area, or the data that is in the active registers (see
Figure 51). Readback of the buffer or active registers is controlled
by Register 0x004[0].
The AD9516 supports only the long instruction mode; therefore,
Register 0x000[4:3] must be set to 11b. (This register uses
mirrored bits). Long instruction mode is the default at power-
up or reset.
The AD9516 uses Register Address 0x000 to Register
Address 0x232.
SCLK
SDIO
SDO
CS
SERIAL
CONTROL
PORT
BUF
F
E
R
RE
G
IS
T
E
RS
UPDATE
REGISTERS
WRITE REGISTER 0x232 = 0x01
TO UDATE REGISTERS
ACT
IV
E
RE
G
IS
T
E
RS
079
72
-03
7
Figure 51. Relationship Between Serial Control Port Buffer Registers and
Active Registers of the AD9516
INSTRUCTION WORD (16 BITS)
The MSB of the instruction word is R/W, which indicates
whether the instruction is a read or a write. The next two bits,
[W1:W0], indicate the length of the transfer in bytes. The final
13 bits are the address ([A12:A0]) at which to begin the read or
write operation.
For a write, the instruction word is followed by the number of
bytes of data indicated by Bits[W1:W0], see Table 42.
Table 42. Byte Transfer Count
W1
W0
Bytes to Transfer
0
1
0
1
2
1
0
3
1
Streaming mode
The 13 bits found in Bits[A12:A0] select the address within the
register map that is written to or read from during the data
transfer portion of the communications cycle. Only Bits[A9:A0]
are needed to cover the range of the 0x232 registers used by the
AD9516. Bits[A12:A10] must always be set to 0b. For multibyte
transfers, this address is the starting byte address. In MSB first
mode, subsequent bytes decrement the address.
MSB/LSB FIRST TRANSFERS
The AD9516 instruction word and byte data can be MSB first
or LSB first. Any data written to Register 0x000 must be mirrored;
the upper four bits (Bits[7:4]) must mirror the lower four bits
(Bits[3:0]). This makes it irrelevant whether LSB first or MSB first
is in effect. As an example of this mirroring, see the default
setting for this register: 0x000, which mirrors Bit 4 and Bit 3.
This sets the long instruction mode (which is the default and
the only mode that is supported).
The default for the AD9516 is MSB first.
When LSB first is set by Register 0x000[1] and Register 0x000[6],
it takes effect immediately, because it affects only the operation
of the serial control port and does not require that an update be
executed.
When MSB first mode is active, the instruction and data bytes
must be written from MSB to LSB. Multibyte data transfers in
MSB first format start with an instruction byte that includes the
register address of the most significant data byte. Subsequent data
bytes must follow, in order, from high address to low address. In
MSB first mode, the serial control port internal address generator
decrements for each data byte of the multibyte transfer cycle.
When LSB first is active, the instruction and data bytes must be
written from LSB to MSB. Multibyte data transfers in LSB first
format start with an instruction byte that includes the register
address of the least significant data byte followed by multiple
data bytes. The internal byte address generator of the serial control
port increments for each byte of the multibyte transfer cycle.
The AD9516 serial control port register address decrements from
the register address just written toward 0x000 for multibyte I/O
operations if the MSB first mode is active (default). If the LSB
first mode is active, the register address of the serial control port
increments from the address just written toward Register 0x232
for multibyte I/O operations.
Streaming mode always terminates when it hits Address 0x232.
Note that unused addresses are not skipped during multibyte
I/O operations.
Table 43. Streaming Mode (No Addresses Are Skipped)
Write Mode
Address Direction
Stop Sequence
LSB first
Increment
0x230, 0x231, 0x232, stop
MSB first
Decrement
0x001, 0x000, 0x232, stop
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