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參數(shù)資料
| 型號： | AD73360LAR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Six-Input Channel Analog Front End |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 287K |
| 代理商： | AD73360LAR |
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REV. 0
AD73360L
–11–
Table IV. Control Word Description
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
C/
D
R/
W
DEVICE ADDRESSS
REGISTER ADDRESS
REGISTER DATA
Control
Frame
Description
Bit 15
Control/
Data
When set high, it signifies a control word in Program or Mixed Program/Data Modes. When set
low, it signifies an invalid control word in Program Mode.
When set low, it tells the device that the data field is to be written to the register selected by the
register field setting provided the address field is zero. When set high, it tells the device that the
selected register is to be written to the data field in the serial register and that the new control
word is to be output from the device via the serial output.
This 3-bit field holds the address information. Only when this field is zero is a device selected. If
the address is not zero, it is decremented and the control word is passed out of the device via the
serial output.
This 3-bit field is used to select one of the eight control registers on the AD73360L.
This 8-bit field holds the data that is to be written to the selected register provided the device
address field is zero.
Bit 14
Read/
Write
Bits 13
–
11
Device Address
Bits 10
–
8
Bits 7
–
0
Register Address
Register Data
Table III. Control Register Map
Address (Binary)
Name
Description
Type
Width
Reset Setting (Hex)
000
001
010
011
100
101
110
111
CRA
CRB
CRC
CRD
CRE
CRF
CRG
CRH
Control Register A
Control Register B
Control Register C
Control Register D
Control Register E
Control Register F
Control Register G
Control Register H
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
8
8
8
8
8
8
8
8
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Table V. Control Register A Description
7
6
5
4
3
2
1
0
RESET
DC2
DC1
DC0
SLB
RES
MM
DATA/
PGM
Bit Name
Description
0
1
2
3
4
5
6
7
DATA/
PGM
MM
Reserved
SLB
DC0
DC1
DC2
RESET
Operating Mode (0 = Program; 1 = Data Mode)
Mixed Mode (0 = OFF; 1 = Enabled)
Must Be Programmed to Zero (0)
SPORT Loop-Back Mode (0 = OFF; 1 = Enabled)
Device Count (Bit 0)
Device Count (Bit 1)
Device Count (Bit 2)
Software Reset (0 = OFF; 1 = Initiates Reset)
CONTROL REGISTER A
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| AD73360LAR-REEL | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 3.3V 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:AFE GEN PURPOSE 6ADC 16BIT 3.3V/3.3V/3.3V 28SOIC W - Tape and Reel |
| AD73360LAR-REEL7 | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 3.3V 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:AFE GEN PURPOSE 6ADC 16BIT 3.3V/3.3V/3.3V 28SOIC W - Tape and Reel |
| AD73360LARZ | 功能描述:IC PROCESSOR FRONTEND 6CH 28SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
| AD73360LARZ-REEL | 功能描述:IC PROCESSOR FRONTEND 6CH 28SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
| AD73360LARZ-REEL7 | 功能描述:IC PROCESSOR FRONTEND 6CH 28SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
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