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參數(shù)資料
| 型號： | AD73360 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Six-Input Channel Analog Front End(通用6通道模擬輸入前端) |
| 中文描述： | 六輸入通道模擬前端（通用6通道模擬輸入前端） |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 264K |
| 代理商： | AD73360 |
–1–
Prelim A1 02/98
Preliminary Technical Data
a
General Purpose CMOS
Six Channel Analog Input Front End
FEATURES
Six 16-Bit A/D Converters
Programmable Input Sample Rate
75 dB ADC SNR
64 kS/s Maximum Sample Rate
TBD dB Crosstalk
Low Group Delay (25
μ
s typ per ADC Channel
Programmable Input Gain
Flexible Serial Port which Allows multiple devices
to be Connected in Cascade
Single (+2.7 V to +5.5 V) Supply Operation
TBD mW Max Power Consumption at 2.7 V
On-Chip Reference
28-Pin SOIC & 44-Pin LQFP Packages
APPLICATIONS
General Purpose Analog Input
Industrial Power Metering
AD73360
GENERAL DESCRIPTION
The AD73360 is a six channel analog input front-end processor
for general purpose applications including industrial power
metering or multi-channel analog inputs. It features six 16-bit
A/D conversion channels each of which provide 70 dB signal-
to-noise ratio over a voiceband signal bandwidth. It also
features a programmable input gain amplifier (PGA) with gain
settings in eight stages from 0 dB to 38 dB.
The AD73360 is particularly suitable for industrial power
metering as each channel samples synchronously ensuring that
there is very little time (phase) delay between the conversions.
The AD73360 also features low group delay conversions on all
channels.
An on-chip reference voltage is included to allow single
supply operation. This reference is programmable to
accomodate either 3V or 5V operation.
The sampling rate of the device is programmable with four
separate settings offering 64, 32, 16 and 8 kHz sampling rates
(from a master clock of 16.384 MHz).
A serial port (SPORT) allows easy interfacing of single or cas-
caded devices to industry standard DSP engines. The SPORT
transfer rate is programmable to allow interfacing to both fast
and slow DSP engines.
The AD73360 is available in 28-pin SOIC and 44-pin LQFP
packages.
VINN1
VINP1
Analog
Sigma-Delta
Modulator
-
+
0/38dB
PGA
Decimator
SDI
SDIFS
SCLK
Serial
I/O
Port
REFCAP
REFOUT
Reference
SE
RESET
SDOFS
SDO
MCLK
Analog
Sigma-Delta
Modulator
-
+
0/38dB
PGA
Decimator
VINN2
VINP2
Analog
Sigma-Delta
Modulator
-
+
0/38dB
PGA
Decimator
VINN3
VINP3
Analog
Sigma-Delta
Modulator
-
+
0/38dB
PGA
Decimator
VINN4
VINP4
Analog
Sigma-Delta
Modulator
-
+
0/38dB
PGA
Decimator
VINN5
VINP5
Analog
Sigma-Delta
Modulator
-
+
0/38dB
PGA
Decimator
VINN6
VINP6
AD73360
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD73360AR | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 5V 28-Pin SOIC W 制造商:Analog Devices 功能描述:IC 16-BIT ADC |
| AD73360AR-REEL | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 5V 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:AFE GEN PURPOSE 6ADC 16BIT 5V/5V/5V 28SOIC W - Tape and Reel |
| AD73360AR-REEL7 | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 5V 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:AFE GEN PURPOSE 6ADC 16BIT 5V/5V/5V 28SOIC W - Tape and Reel |
| AD73360ARZ | 功能描述:IC PROCESSOR FRONTEND 6CH 28SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
| AD73360ARZ | 制造商:Analog Devices 功能描述:ANALOG FRONT END 6 CH 28SOIC |
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