參數(shù)資料
型號(hào)： AD73360
廠商： Analog Devices, Inc.
英文描述： Six-Input Channel Analog Front End(通用6通道模擬輸入前端)
中文描述： 六輸入通道模擬前端（通用6通道模擬輸入前端）
文件頁(yè)數(shù)： 14/14頁(yè)
文件大?。?/td> 264K
代理商： AD73360
Preliminary Technical Data
AD73360
–14–
Prelim A1 02/98
Table XVI. Control Register D Description
CONTROL REGISTER D
Bit
Name
Description
0
1
2
3
4
5
6
7
IGADC1-0
IGADC1-1
IGADC1-2
PUADC1
IGADC2-0
IGADC2-1
IGADC2-2
PUADC2
ADC1:Input Gain Select (Bit 0)
ADC1:Input Gain Select (Bit 1)
ADC1:Input Gain Select (Bit 2)
Power Control (ADC1); 1 = ON, 0 = OFF
ADC2:Input Gain Select (Bit 0)
ADC2:Input Gain Select (Bit 1)
ADC2:Input Gain Select (Bit 2)
Power Control (ADC2); 1 = ON, 0 = OFF
Table XVII. Control Register E Description
CONTROL REGISTER E
Bit
Name
Description
0
1
2
3
4
5
6
7
IGADC3-0
IGADC3-1
IGADC3-2
PUADC3
IGADC4-0
IGADC4-1
IGADC4-2
PUADC4
ADC3:Input Gain Select (Bit 0)
ADC3:Input Gain Select (Bit 1)
ADC3:Input Gain Select (Bit 2)
Power Control (ADC3); 1 = ON, 0 = OFF
ADC4:Input Gain Select (Bit 0)
ADC4:Input Gain Select (Bit 1)
ADC4:Input Gain Select (Bit 2)
Power Control (ADC4); 1 = ON, 0 = OFF
Table XVIII. Control Register F Description
CONTROL REGISTER F
Bit
Name
Description
0
1
2
3
4
5
6
7
IGADC5-0
IGADC5-1
IGADC5-2
PUADC5
IGADC6-0
IGADC6-1
IGADC6-2
PUADC6
ADC5:Input Gain Select (Bit 0)
ADC5:Input Gain Select (Bit 1)
ADC5:Input Gain Select (Bit 2)
Power Control (ADC5); 1 = ON, 0 = OFF
ADC6:Input Gain Select (Bit 0)
ADC6:Input Gain Select (Bit 1)
ADC6:Input Gain Select (Bit 2)
Power Control (ADC6); 1 = ON, 0 = OFF
7
6
5
4
3
2
1
0
PUADC2
IGADC2-2
IGADC2-1
IGADC2-0
PUADC1
IGADC1-2
IGADC1-1
IGADC1-0
7
6
5
4
3
2
1
0
PUADC4
IGADC4-2
IGADC4-1
IGADC4-0
PUADC3
IGADC3-2
IGADC3-1
IGADC3-0
7
6
5
4
3
2
1
0
PUADC6
IGADC6-2
IGADC6-1
IGADC6-0
PUADC5
IGADC5-2
IGADC5-1
IGADC5-0
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