參數(shù)資料
型號(hào)： AD1843JS
廠商： ANALOG DEVICES INC
元件分類(lèi)： 消費(fèi)家電
英文描述： CAP 3300PF 100V CERAMIC DISC Y5P
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： PLASTIC, QFP-80
文件頁(yè)數(shù)： 46/64頁(yè)
文件大?。?/td> 848K
代理商： AD1843JS
REV. 0
–46–
AD1843
DA1FLT
DAC1 (Left and Right Channels) Digital Filter Select. This bit is overridden when DRSFLT is set to “1.” See be-
low for filter specifications. This bit can be altered only if DAC1 is powered down. Unlike DA2FLT, this bit does
not control the analog output swing of DAC1, which is fixed at 2.000 V p-p when the output level is set to 0 dB by
Control Register Address 9.
0
= Digital Audio Filter
1 = Digital Modem Filter
Digital ADC Right Channel Source Select.
00
= Input from Analog: ADC Right Channel (Normal Operation)
01 = Reserved
10 = Input from Digital: DAC1 Right Channel (Digital Resampler)
11 = Input from Digital: DAC2 Right Channel (Digital Resampler)
Digital ADC Left Channel Source Select.
00
= Input from Analog: ADC Left Channel (Normal Operation)
01 = Reserved
10 = Input from Digital: DAC1 Left Channel (Digital Resampler)
11 = Input from Digital: DAC2 Left Channel (Digital Resampler)
ADC Right Channel Digital Filter Select and Analog Input Full Scale Mapping Select. Digital filter selected is over-
ridden when DRSFLT is set to “1.” See below for filter specifications. This bit can be altered only if the ADC right
channel is powered down.
0
= Digital Audio Filter. 2.800 V p-p analog input maps to
±
2
15
when gain is set to 0.0 dB (see Control Register
Address 2).
1 =Digital Modem Filter. 3.156 V p-p analog input maps to
±
2
15
when gain is set to 0.0 dB (see Control Register
Address 2).
ADC Left Channel Digital Filter Select and Analog Input Full Scale Mapping Select. Digital filter selected is over-
ridden when DRSFLT is set to “1.” See below for filter specifications. This bit can be altered only if the ADC left
channel is powered down.
0
= Digital Audio Filter. 2.800 V p-p analog input maps to
±
2
15
when gain is set to 0.0 dB (see Control Register
Address 2).
1 = Digital Modem Filter. 3.156 V p-p analog input maps to
±
2
15
when gain is set to 0.0 dB (see Control Register
Address 2).
Reserved for future expansion. To ensure future compatibility, write “0” to all reserved bits.
Initial default state after reset: 0000 0000 0000 0000 (0000 hex). Cleared to default and cannot be written to when:
the
RESET
pin is asserted LO; when the
PWRDWN
pin is asserted LO; or when the PDNO bit in Control Register
Address 0 is set to “1” (all conversions disabled).
The table below lists the single path (DAC or ADC only) filter characteristics of the “Audio,” “Modem,” and “Resampler” digital
filters. Passband ripple and group delay must be doubled if the DAC is routed back through the ADC for digital resampling. For
further information, see the “Filter Selection” section and the filter frequency response plots, Figures 34 through 36.
DAADR1:0
DAADL1:0
ADRFLT
ADLFLT
res
Passband
Ripple
Stopband
Ripple
Linear
Group Delay
Filter
Edge
Edge
Audio
Modem
Resampler
–0.016 dB
–0.220 dB
–0.035 dB
0.400
×
F
S
0.442
×
F
S
0.400
×
F
S
< –91.8 dB
< –75.7 dB
< –92.2 dB
0.600
×
F
S
0.542
×
F
S
0.500
×
F
S
< 15/F
S
< 19/F
S
< 25/F
S
F
S
is the conversion (sample) rate.
Address 26
Codec Configuration—Serial Interface
Data 15
Data 14
Data 13
Data 12
Data 11
Data 10
Data 9
Data 8
DA2SM
DA1SM
res
res
DA2F1
DA2F0
DA1F1
DA1F0
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
SCF
FRS
FRST
ADTLK
ADRF1
ADRF0
ADLF1
ADLF0
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