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Rev.1.00 Jul 30, 2003 page 76 of 119
7643 Group
Notes 1:
Test conditions: I
OHL
=
±
5mA, C
L
= 50 pF
2:
t
wL
(RD) = ((n + 0.5) tc(PHI)) – 5 ns (n = wait number)
t
wL
(WR) = ((n + 0.5) tc(PHI)) – 5 ns (n = wait number)
For example, two software waits, PHI = 12 MHz operating
t
wL
(RD) = 2.5 tc(PHI) – 5 ns = 203.33 ns
Table 15 Recommended operating conditions
(Vcc = 3.0 to 3.6 V, Vss = 0 V, Ta = –20 to 70°C, unless otherwise noted)
Power source voltage
Analog reference voltage
Power source voltage
Analog reference voltage
DC-DC converter voltage
“H” input voltage
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P2
0
–P2
7
RESET, X
IN
, X
CIN
, CNVss
USB D+, USB D–
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P2
0
–P2
7
RESET, X
IN
, X
CIN
, CNVss
USB D+, USB D–
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
“H” input voltage (Selecting VIHL level input)
“H” input voltage
“H” input voltage
“L” input voltage
“L” input voltage (Selecting VIHL level input)
“L” input voltage
“L” input voltage
“H” total peak output current
(
Note 1
)
“L” total peak output current
(
Note 1
)
“H” total average output current P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
(
Note 1
)
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
“L” total average output current P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
(
Note 1
)
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7,
P3
0
–P3
7,
P4
0
–P4
4,
P5
0
–P5
7,
P6
0
–P6
7,
P7
0
–P7
4,
P8
0
–P8
7
“H” peak output current
(
Note 2
)
“L” peak output current
(
Note 2
)
“H” average output current
(
Note 3
)
“L” average output current
(
Note 3
)
Main clock input frequency (
Notes 4, 5
)
Sub-clock input frequency (
Notes 4, 6
)
V
CC
AVcc
V
SS
AV
SS
Ext. Cap.
V
IH
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
V
IL
Σ
I
OH(peak)
Σ
I
OL(peak)
Σ
I
OH(avg)
Σ
I
OL(avg)
I
OH(peak)
I
OL(peak)
I
OH(avg)
I
OL(avg)
f(X
IN
)
f(X
CIN
)
Limits
Typ.
3.3
3.3
0
0
3.3
V
V
V
V
V
Parameter
Min.
3.0
3.0
3.0
0.8V
CC
0.5V
CC
0.8V
CC
2.0
0
Max.
3.6
V
CC
Symbol
Unit
3.6
V
CC
Recommended Operating Conditions
In Vcc = 3 V
0
0
1
V
CC
V
CC
0.2V
CC
0.16V
CC
0.2V
CC
0.8
–80
80
–40
40
–10
10
–5.0
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
32.768
5.0
24
50/5.0
MHz
kHz/MHz
Notes 1:
The total peak output current is the peak value of the peak currents flowing through all the applicable ports. The total average output current is the average
value measured over 100 ms flowing through all the applicable ports.
2:
The peak output current is the peak current flowing in each port.
3:
The average output current is an average value measured over 100 ms.
4:
The duty of oscillation frequency is 50
%.
5:
Connect a ceramic resonator or a quartz-crystal oscillator between the X
IN
and X
OUT
pins. Its maximum oscillation frequency must be 24 MHz. However,
make sure to set
φ
to 6 MHz or slower. More faster clocks are required as the f(X
IN
) when using the frequency synthesizer as possible.
6:
Connect a ceramic resonator or a quartz-crystal oscillator between the X
CIN
and X
COUT
pins. Its maximum oscillation frequency must be 50 kHz. Input an
external clock having 5 MHz (max.) frequency from the X
CIN
pin.