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| 型號(hào)： | 7643 |
| 英文描述： | IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-SOIC 300mil, TUBE |
| 中文描述： | 7643Group數(shù)據(jù)表數(shù)據(jù)表1369K/JUL.30.03 |
| 文件頁(yè)數(shù)： | 52/120頁(yè) |
| 文件大小： | 1369K |
| 代理商： | 7643 |
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Rev.1.00 Jul 30, 2003 page 52 of 119
7643 Group
[USB Endpoint x (x = 1, 2) OUT Control Register] OUT_CSR
This register contains the information and status of the respective
OUT endpoints 1, 2. In the endpoint 0, all bits are reserved and
cannot be used (they will all be read out as “0”). The USB FCU
sets the OUT_PKT_RDY flag to “1” after a data packet has been
received into the OUT FIFO. After reading the data packet in the
OUT FIFO, clear this flag to “0”. However, if there is still data in the
OUT FIFO, the flag cannot be cleared even by writing “0” by soft-
ware.
Fig. 45 Structure of USB endpoint x (x = 1, 2) OUT control register
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Notes 1
: This bit is automatically set to “1” or cleared to “0”.
2
: The user must program to “1” or “0”.
3
: When AUTO_SET bit is “0”, the user must set to “1”.
When AUTO_SET bit is “1”, this bit is automatically set to “1”.
4:
This bit is automatically cleared to “0” after setting “1”.
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