Central Processing Unit
Technical Data
MC68HC912DG128 — Rev 3.0
32
Central Processing Unit
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MOTOROLA
Table 2-1. M68HC12 Addressing Mode Summary
Addressing Mode
Source Format
INST
(no externally supplied
operands)
INST #
opr8i
or
INST #
opr16i
Abbreviation
Description
Inherent
INH
Operands (if any) are in CPU registers
Immediate
IMM
Operand is included in instruction stream
8- or 16-bit size implied by context
Direct
INST
opr8a
DIR
Operand is the lower 8-bits of an address in the
range $0000 – $00FF
Operand is a 16-bit address
Extended
INST
opr16a
INST
rel8
or
INST
rel16
EXT
Relative
REL
An 8-bit or 16-bit relative offset from the current
pc is supplied in the instruction
Indexed
(5-bit offset)
Indexed
(auto pre-decrement)
Indexed
(auto pre-increment)
Indexed
(auto post-
decrement)
Indexed
(auto post-increment)
Indexed
(accumulator offset)
Indexed
(9-bit offset)
Indexed
(16-bit offset)
INST
oprx5
,
xysp
IDX
5-bit signed constant offset from x, y, sp, or pc
INST
oprx3
,
–
xys
IDX
Auto pre-decrement x, y, or sp by 1 ~ 8
INST
oprx3
,+
xys
IDX
Auto pre-increment x, y, or sp by 1 ~ 8
INST
oprx3
,
xys
–
IDX
Auto post-decrement x, y, or sp by 1 ~ 8
INST
oprx3
,
xys
+
IDX
Auto post-increment x, y, or sp by 1 ~ 8
INST
abd
,
xysp
IDX
Indexed with 8-bit (A or B) or 16-bit (D)
accumulator offset from x, y, sp, or pc
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
INST
oprx9
,
xysp
IDX1
INST
oprx16
,
xysp
IDX2
Indexed-Indirect
(16-bit offset)
INST [
oprx16
,
xysp
]
[IDX2]
Indexed-Indirect
(D accumulator
offset)
INST [D,
xysp
]
[D,IDX]
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
F
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n
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