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參數(shù)資料
| 型號： | 5962-9205805QXA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 32-BIT, 60 MHz, OTHER DSP, CPGA141 |
| 封裝： | STAGGERED, CERAMIC, PGA-141 |
| 文件頁數(shù)： | 6/54頁 |
| 文件大?。?/td> | 1033K |
| 代理商： | 5962-9205805QXA |
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SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G APRIL 1998 REVISED SEPTEMBER 2006
14
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(see Note 3)
PARAMETER
TEST CONDITIONS
’C31
’LC31
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
VDD = MIN, IOH = MAX
2.4
3
2
V
VOL
Low-level output voltage
VDD = MIN, IOH = MAX
0.3
0.6
0.4
V
IZ
High-impedance current
VDD = MAX
20
+ 20
20
+ 20
A
II
Input current
VI = VSS to VDD
10
+ 10
10
+ 10
A
IIP
Input current (with internal
pullup)
Inputs with internal pullups§
600
20
600
10
A
ICC
Supply current#
TA = 25°C,
fx = 40 MHz
’C31-40
’LC31-40
160
400
150
300
mA
ICC
Supply current#
TA = 25°C,
VDD = MAX
fx = 50 MHz ’C31-50
200
425
mA
VDD = MAX
fx = 60 MHz ’C31-60
225
475
IDD
Supply current
Standby,
IDLE2
Clocks shut off
50
20
A
Ci
Input
All inputs except CLKIN
15*
pF
Ci
Input
capacitance
CLKIN
25
pF
Co
Output capacitance
20*
pF
All input and output voltage levels are TTL compatible.
For ’C31, all typical values are at VDD = 5 V, TA = 25°C. For ’LC31, all typical values are at VDD = 3.3 V, TA = 25°C.
§ Pins with internal pullup devices: INT3 INT0, MCBL / MP.
Actual operating current is less than this maximum value. This value was obtained under specially produced worst-case test conditions, which
are not sustained during normal device operation. These conditions consist of continuous parallel writes of a checkerboard pattern to both primary
and expansion buses at the maximum rate possible. See Calculation of TMS320C30 Power Dissipation Application Report (literature number
SPRA020).
# fx is the input clock frequency.
* This parameter is not production tested.
NOTE 3: All voltage values are with respect to VSS. All input and output voltage levels are TTL-compatible. CLKIN can be driven by a CMOS
clock.
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