參數(shù)資料
型號(hào)： 5962-9205805QXA
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 32-BIT, 60 MHz, OTHER DSP, CPGA141
封裝： STAGGERED, CERAMIC, PGA-141
文件頁數(shù)： 10/54頁
文件大?。?/td> 1033K
代理商： 5962-9205805QXA
SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G APRIL 1998 REVISED SEPTEMBER 2006
18
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
timing
Timing specifications apply to the SMJ320C31 and SMJ320LC31.
X2/CLKIN, H1, and H3 timing
The following table defines the timing parameters for the X2/CLKIN, H1, and H3 interface signals.
timing parameters for X2/CLKIN, H1, H3 (see Figure 10, Figure 11, Figure 12, and Figure 13)
NO.
’C31-40
’LC31-40
’C31-50
’C31-60
UNIT
NO.
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
1
tf(CI)
Fall time, CLKIN
5*
4*
ns
2
tw(CIL)
Pulse duration, CLKIN low tc(CI) = min
9
7
6
ns
3
tw(CIH)
Pulse duration, CLKIN high tc(CI) = min
9
7
6
ns
4
tr(CI)
Rise time, CLKIN
5*
4*
ns
5
tc(CI)
Cycle time, CLKIN
25
303
20
303
16.67
303
ns
6
tf(H)
Fall time, H1 and H3
3
ns
7
tw(HL)
Pulse duration, H1 and H3 low
P5
P 5
P 4
ns
8
tw(HH)
Pulse duration, H1 and H3 high
P6
P 6
P 5
ns
9
tr(H)
Rise time, H1 and H3
3
ns
10
td(HL-HH)
Delay time. from H1 low to H3 high or from H3 low to H1
high
0
4
0
4
0
4
ns
11
tc(H)
Cycle time, H1 and H3
50
606
40
606
33.3
606
ns
P = tc(CI)
* This parameter is not production tested.
1
4
X2/CLKIN
3
5
2
Figure 10. Timing for X2/CLKIN
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