- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371440 > 29PL256N (Spansion Inc.) 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | 29PL256N |
| 廠商： | Spansion Inc. |
| 英文描述： | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| 中文描述： | 256/128/128字節(jié)（16/8/8 M中的x 16位），3.0伏的CMOS只同步讀/寫，頁模式閃存 |
| 文件頁數(shù)： | 49/74頁 |
| 文件大?。?/td> | 1968K |
| 代理商： | 29PL256N |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當(dāng)前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁
June 6, 2007 S29PL-N_00_A5
S29PL-N MirrorBit
Flash Family
49
D a t a
S h e e t
( P r e l i m i n a r y )
8.7
Hardware Data Protection Methods
The device offers data protection at the sector level via hardware control:
When WP#/ACC is at V
IL
, the four outermost sectors are locked (device specific).
There are additional methods by which intended or accidental erasure of any sectors can be prevented via
hardware means. The following subsections describes these methods:
8.7.1
WP# Method
The Write Protect feature provides a hardware method of protecting the four outermost sectors. This function
is provided by the WP#/ACC pin and overrides the previously discussed Sector Protection/Unprotection
method.
If the system asserts V
IL
on the WP#/ACC pin, the device disables program and erase functions in the
outermost
boot sectors. The outermost boot sectors are the sectors containing both the lower and upper set
of sectors in a dual-boot-configured device.
If the system asserts V
IH
on the WP#/ACC pin, the device reverts to whether the boot sectors were last set to
be protected or unprotected. That is, sector protection or unprotection for these sectors depends on whether
they were last protected or unprotected.
Note that the WP#/ACC pin must not be left floating or unconnected as inconsistent behavior of the device
may result.
The WP#/ACC pin must be held stable during a command sequence execution
8.7.2
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not accept any write cycles. This protects data during V
CC
power-up and power-down.
The command register and all internal program/erase circuits are disabled, and the device resets to reading
array data. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the
proper signals to the control inputs to prevent unintentional writes when V
CC
is greater than V
LKO
.
8.7.3
Write Pulse
Glitch Protection
Noise pulses of less than 3 ns (typical) on OE#, CE# or WE# do not initiate a write cycle.
8.7.4
Power-Up Write Inhibit
If WE# = CE# = RESET# = V
IL
and OE# = V
IH
during power up, the device does not accept commands on the
rising edge of WE#. The internal state machine is automatically reset to the read mode on powerup.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 29PS | 25PS, 42PS, 44PS, 45PS and 46PS Series Pressure Switches |
| 29SL800CB-90 | 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 1.8V ONLY FLASH MEMORY |
| 29SL800CT-90 | 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 1.8V ONLY FLASH MEMORY |
| 29U194A | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 29U194ADFE | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 29PN | 制造商:APEM 功能描述: |
| 29PP100-2 | 制造商:SPD 功能描述: |
| 29PP113-1 | 制造商:SOURIAU 功能描述:JEWELRY CLASS |
| 29PP123-1 | 制造商:SPD 功能描述: |
| 29PP123-3 | 制造商:SPD 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。