- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371440 > 29LV160BE (Fujitsu Limited) 16M (2M X 8/1M X 16) BIT PDF資料下載
參數(shù)資料
| 型號： | 29LV160BE |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16M (2M X 8/1M X 16) BIT |
| 中文描述： | 16米（2米x 8/1M × 16）位 |
| 文件頁數(shù)： | 19/59頁 |
| 文件大?。?/td> | 653K |
| 代理商： | 29LV160BE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁
MBM29LV160TE/BE
-70/90/12
19
Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be
programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success
according to the data polling algorithm but a read from read/reset mode will show that the data is still “0”. Only
erase operations can convert “0”s to “1”s.
Figure 20 illustrates the Embedded Program
TM
Algorithm using typical command strings and bus operations.
Chip Erase
Chip erase is a six-bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.
Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase
Algorithm command sequence the device will automatically program and verify the entire memory for an all zero
data pattern prior to electrical erase. (Preprogram Function.) The system is not required to provide any controls
or timings during these operations.
The automatic erase begins on the rising edge of the last WE pulse in the command sequence and terminates
when the data on DQ
7
is “1” (See Write Operation Status section.) at which time the device returns to read mode.
(See Figure 8.)
Figure 21 illustrates the Embedded Erase
TM
Algorithm using typical command strings and bus operations.
Sector Erase
Sector erase is a six-bus cycle operation. There are two “unlock” write cycles, followed by writing the “set-up”
command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector address
(any address location within the desired sector) is latched on the falling edge of WE, while the command (Data
= 30H) is latched on the rising edge of WE. After a time-out of “t
TOW
” from the rising edge of the last sector erase
command, the sector erase operation will begin.
Multiple sectors may be erased concurrently by writing six-bus cycle operations on Table 7. This sequence is
followed with writes of the Sector Erase command to addresses in other sectors desired to be concurrently
erased. The time between writes must be less than “t
TOW
” otherwise that command will not be accepted and
erasure will start. It is recommended that processor interrupts be disabled during this time to guarantee this
condition. The interrupts can be re-enabled after the last Sector Erase command is written. A time-out of “t
TOW
”
from the rising edge of the last WE will initiate the execution of the Sector Erase command(s). If another falling
edge of the WE occurs within the “t
TOW
” time-out window the timer is reset. Monitor DQ
3
to determine if the sector
erase timer window is still open. (See section DQ
3
, Sector Erase Timer.) Any command other than Sector Erase
or Erase Suspend during this time-out period will reset the device to the read mode, ignoring the previous
command string. Resetting the device once excution has begun will corrupt the data in the sector. In that case,
restart the erase on those sectors and allow them to complete. (Refer to the Write Operation Status section for
Sector Erase Timer operation.) Loading the sector erase buffer may be done in any sequence and with any
number of sectors (0 to 34).
Sector erase does not require the user to program the device prior to erase. The device automatically programs
all memory locations in the sector(s) to be erased prior to electrical erase (Preprogram Function). When erasing
a sector or sectors the remaining unselected sectors are not affected. The system is not required to provide any
controls or timings during these operations.
The automatic sector erase begins after the “t
TOW
” time out from the rising edge of the WE pulse for the last
sector erase command pulse and terminates when the data on DQ
7
is “1” (See Write Operation Status section)
at which time the device returns to the read mode. Data polling must be performed at an address within any of
the sectors being erased. Multiple Sector Erase Time; [Sector Program Time (Preprogramming) + Sector Erase
Time]
×
Number of Sector Erase.
Figure 21 illustrates the Embedded Erase
TM
Algorithm using typical command strings and bus operations.
Erase Suspend/Resume
The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads
from or program to a sector not being erased. This command is applicable ONLY during the Sector Erase
operation which includes the time-out period for sector erase. The Erase Suspend command will be ignored if
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 29LV160B | 16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV160B | 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| 29LV160C-55R | 16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV160C-70 | 16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV160C-90 | 16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 29LV160BT-90V | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 29LV160C-55R | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV160C-70 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV160C-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV160DB70EC | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。