參數(shù)資料
型號: 28F640J5
廠商: Intel Corp.
英文描述: 5 V Intel StrataFlash Memory(5V 64M位英特爾StrataFlash閃速存儲器)
中文描述: 5伏特英特爾StrataFlash存儲器(5V的6400位英特爾的StrataFlash閃速存儲器)
文件頁數(shù): 4/53頁
文件大?。?/td> 272K
代理商: 28F640J5
28F320J5/28F640J5
E
4
PRELIMINARY
REVISION HISTORY
Date of
Revision
Version
Description
09/01/97
-001
Original Version
09/17/97
-002
Modifications made to cover sheet
12/01/97
-003
V
CC
/GND Pins Converted to No Connects specification change added
I
CCS
, I
CCD
, I
CCW
, and I
CCE
specification change added
Order Codes specification change added
01/31/98
-004
The
μ
BGA* chip-scale package in Figure 2 was changed to a 52-ball
package and appropriate documentation added. The 64-Mb
μ
BGA
package dimensions were changed in Figure 2. Changed Figure 4 to read
SSOP instead of TSOP.
03/23/98
-005
32-Mbit Intel StrataFlash memory read access time added. The number
of block erase cycles was changed. The write buffer program time was
changed. The operating temperature was changed. A read parameter
was added. Several program, erase, and lock-bit specifications were
changed. Minor documentation changes were made as well. Datasheet
designation changed from Advance Information to Preliminary.
07/13/98
-006
Intel StrataFlash memory 32-Mb
μ
BGA package removed. t
EHEL
read
specification reduced. Table 4 was modified. The Ordering Information
was updated.
12/01/98
-007
Removed 32 Mbit, 100 ns references and ordering information for same.
Provided clearer V
OH
specifications. Provided maximum program/erase
specifications. Added Input Signal Transitions
– Reducing Overshoots
and Undershoots When Using Buffers/Transceivers
to Design
Considerations section.
Name of document changed from Intel
StrataFlash Memory
Technology 32 and 64 Mbit.
05/04/99
-008
Updated CFI Tables, Section 4.2.1
—Section 4.2.7
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參數(shù)描述
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