參數(shù)資料
型號(hào): 28F020
廠商: Intel Corp.
英文描述: 5 V Bulk Erase Flash Memory(5V 整體擦寫(xiě)閃速存儲(chǔ)器)
中文描述: 5伏體擦除閃存(5V的整體擦寫(xiě)閃速存儲(chǔ)器)
文件頁(yè)數(shù): 7/47頁(yè)
文件大?。?/td> 758K
代理商: 28F020
E
28F010/28F020
7
Table 1. Pin Description
Symbol
Type
Name and Function
A
0
–A
16
INPUT
ADDRESS INPUTS
for memory addresses. Addresses are internally
latched during a write cycle. 28F010: A[0–16], 28F020: A[0–17]
DQ
0
–DQ
7
INPUT/OUTPUT
DATA INPUT/OUTPUT:
Inputs data during memory write cycles; outputs
data during memory read cycles. The data pins are active high and float to
tri-state
off
when the chip is deselected or the outputs are disabled. Data is
internally latched during a write cycle
CE#
INPUT
CHIP ENABLE:
Activates the device's control logic, input buffers, decoders
and sense amplifiers. CE# is active low; CE# high deselects the memory
device and reduces power consumption to standby levels.
OE#
INPUT
OUTPUT ENABLE:
Gates the devices output through the data buffers
during a read cycle. OE# is active low.
WE#
INPUT
WRITE ENABLE:
Controls writes to the control register and the array. Write
enable is active low. Addresses are latched on the falling edge and data is
latched on the rising edge of the WE# pulse.
Note:
With V
PP
6.5 V, memory contents cannot be altered.
V
PP
ERASE/PROGRAM POWER SUPPLY
for writing the command register,
erasing the entire array, or programming bytes in the array.
V
CC
DEVICE POWER SUPPLY
(5 V ±10%)
V
SS
GROUND
NC
NO INTERNAL CONNECTION
to device. Pin may be driven or left floating.
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28F020N12 制造商: 功能描述: 制造商:undefined 功能描述:
28F020N-15 制造商: 功能描述: 制造商:undefined 功能描述:
28F020N-90 制造商: 功能描述: 制造商:undefined 功能描述: