3.0 Registers
CN8223
3.8 Event/Error Counters
ATM Transmitter/Receiver with UTOPIA Interface
3-42
Conexant
100046C
bit 3.
Table 3-21. Internal DS3 PLCP and Direct Mapping Modes Event/Error Counters
Address
Counter Name
Function
0x40
LINE_ PHY_CNTR_1
Line Code Violation (LCV) in B3ZS/HDB3 decoder when enabled. For B3ZS this counts
both bipolar rule violations and occurrences of three or more 0s. For HDB3 this counts
violations according to ITU Recommendation 0.161.
0x41
LINE_ PHY_CNTR_2
Counts F and M-bit errors.
0x42
LINE_ PHY_CNTR_3
Counts P1/P2 parity errors.
0x43
LINE_ PHY_CNTR_4
Counts C bit path parity errors.
0x44
LINE_ PHY_CNTR_5
Counts DS3 FEBE errors.
0x45
LINE_ PHY_CNTR_6
Counts PLCP frame errors if there is an error in either A1 or A2 octets. Event also appears
on LINE_STATUS, bit 9. Not used in Direct Mapping mode.
0x46
LINE_ PHY_CNTR_7
Counts PLCP OOF events in PLCP Mode. Counts LOCD events in Direct Mapping mode.
Event also appears on LINE_STATUS, bit 5. Not used in Direct Mapping mode.
0x47
LINE_ PHY_CNTR_8
Counts PLCP BIP errors. Event also appears on LINE_STATUS, bit 10. Not used in Direct
Mapping mode.
0x48
LINE_ PHY_CNTR_9
Counts PLCP FEBE errors. Event also appears on LINE_STATUS, bit 11. Not used in
Direct Mapping mode.
0x49
COR_HEC_ERR
Counts corrected HEC errors. Event also appears on EVENT_STATUS, bit 0.
0x4A
UNCOR_HEC_ERR
Counts uncorrected HEC errors. Event also appears on EVENT_STATUS, bit 1.
0x4B
PAY_CRC_ERR
Counts payload CRC-10 errors used in AAL3/4. Event also appears on EVENT_STATUS,
bit 2.
0x4C
PAY_LEN_ERR
Counts payload length errors used in AAL3/4. Event also appears on EVENT_STATUS,
0x4D
NON_ZERO_GFC
Counts ATM cells received with non-zero GFC fields. Event also appears on
EVENT_STATUS, bit 4.
0x4E
CELL_SENT_CNT0
Count of ATM cells sent from FIFO port 0. Event also appears on CELL_STATUS, bit 0.
0x4F
CELL_SENT_CNT1
Count of ATM cells sent from FIFO port 1. Event also appears on CELL_STATUS, bit 1.
0x50
CELL_SENT_CNT2
Count of ATM cells sent from FIFO port 2. Event also appears on CELL_STATUS, bit 2.
0x51
CELL_SENT_CNT3
Count of ATM cells sent from FIFO port 3. Event also appears on CELL_STATUS, bit 3.
0x52
CELL_RCV_CNT0
Count of ATM cells received on FIFO port 0. Event also appears on CELL_STATUS, bit 4.
0x53
CELL_RCV_CNT1
Count of ATM cells received on FIFO port 1. Event also appears on CELL_STATUS, bit 5.
0x54
CELL_RCV_CNT2
Count of ATM cells received on FIFO port 2. Event also appears on CELL_STATUS, bit 6.
0x55
CELL_RCV_CNT3
Count of ATM cells received on FIFO port 3. Event also appears on CELL_STATUS, bit 7.
0x56
IDLE_CELL_CNT
Counts ATM cells received that match the idle cell header screens. Event also appears on
EVENT_STATUS, bit 6.
0x57
NON_MATCH_CNT
Counts ATM cells received that do not match any header screens. Event also appears on
EVENT_STATUS, bit 5.