
PIC12CE67X
DS40181B-page 26
Preliminary
1998 Microchip Technology Inc.
TABLE 5-1:
SUMMARY OF PORT REGISTERS
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
Resets
85h
TRIS
—
—
GPIO Data Direction Register
--11 1111
--11 1111
81h
OPTION
GPPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
03h
STATUS
IRP
(1)
RP1
(1)
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
05h
GPIO
SCL
SDA
GP5
GP4
GP3
GP2
GP1
GP0
11xx xxxx
11uu uuuu
Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as '0',
x
= unknown,
u
= unchanged,
q = see tables in Section 9.4 for possible values.
Note 1: The IRP and RP1 bits are reserved on the PIC12CE67X, always maintain these bits clear.
5.4
I/O Programming Considerations
5.4.1
BI-DIRECTIONAL I/O PORTS
Any instruction which writes, operates internally as a
read followed by a write operation. The
BCF
and
BSF
instructions, for example, read the register into the
CPU, execute the bit operation and write the result back
to the register. Caution must be used when these
instructions are applied to a port with both inputs and
outputs defined. For example, a
BSF
operation on bit5
of GPIO will cause all eight bits of GPIO to be read into
the CPU. Then the
BSF
operation takes place on bit5
and GPIO is written to the output latches. If another bit
of GPIO is used as a bi-directional I/O pin (e.g., bit0)
and it is defined as an input at this time, the input signal
present on the pin itself would be read into the CPU
and rewritten to the data latch of this particular pin,
overwriting the previous content. As long as the pin
stays in the input mode, no problem occurs. However,
if bit0 is switched to an output, the content of the data
latch may now be unknown.
Reading the port register, reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(ex.
BCF, BSF
, etc.) on a port, the value of the port pins
is read, the desired operation is done to this value, and
this value is then written to the port latch.
Example 5-1 shows the effect of two sequential read-
modify-write instructions on an I/O port.
EXAMPLE 5-1:
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
;Initial GPIO Settings
; GPIO<5:3> Inputs
; GPIO<2:0> Outputs
;
; GPIO latch GPIO pins
; ---------- ----------
BCF GPIO, 5 ;--01 -ppp --11 pppp
BCF GPIO, 4 ;--10 -ppp --11 pppp
MOVLW 007h ;
TRIS GPIO ;--10 -ppp --11 pppp
;
;Note that the user may have expected the pin
;values to be --00 pppp. The 2nd BCF caused
;GP5 to be latched as the pin value (High).
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage the
chip.
FIGURE 5-2:
SUCCESSIVE I/O OPERATION
PC
PC + 1
PC + 2
PC + 3
Q1
Q2
Q3 Q4
Q1
Q2
Q3 Q4 Q1
Q2
Q3 Q4
Q1
Q2
Q3 Q4
Instruction
fetched
GP5:GP0
MOVWF GPIO
NOP
Port pin
sampled here
NOP
MOVF GPIO,W
Instruction
executed
MOVWF GPIO
(Write to
GPIO)
NOP
MOVF GPIO,W
(Read
GPIO)
This example shows a write to GPIO followed
by a read from GPIO.
Data setup time = (0.25 T
CY
– T
PD
)
where: T
CY
= instruction cycle.
T
PD
= propagation delay
Therefore, at higher clock frequencies, a
write followed by a read may be problematic.
Port pin
written here