參數(shù)資料
型號(hào)： 12CE673
廠(chǎng)商： Microchip Technology Inc.
英文描述： HookUp/Lead Wire; Conductor Size AWG:18; No. Strands x Strand Size:65 x 36; Jacket Color:Black; Conductor Material:Copper; Jacket Material:Rubber; Leaded Process Compatible:Yes; Number of Conductors:1; Outer Diameter:0.144" RoHS Compliant: Yes
中文描述： 8引腳，8位CMOS微控制器與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲(chǔ)器
文件頁(yè)數(shù)： 17/116頁(yè)
文件大小： 671K
代理商： 12CE673
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1998 Microchip Technology Inc.
Preliminary
DS40181B-page 17
PIC12CE67X
4.2.2.3
The INTCON Register is a readable and writable regis-
ter which contains various enable and flag bits for the
TMR0 register overflow, GPIO Port change and Exter-
nal GP2/INT Pin interrupts.
INTCON REGISTER
Note:
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
FIGURE 4-5:
INTCON REGISTER (ADDRESS 0Bh, 8Bh)
R/W-0
GIE
bit7
R/W-0
PEIE
R/W-0
T0IE
R/W-0
INTE
R/W-0
GPIE
R/W-0
T0IF
R/W-0
INTF
R/W-x
GPIF
R
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
= Readable bit
bit0
bit 7:
GIE:
Global Interrupt Enable bit
1 = Enables all un-masked interrupts
0 = Disables all interrupts
PEIE:
Peripheral Interrupt Enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE:
TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE:
INT External Interrupt Enable bit
1 = Enables the external interrupt on GP2/INT/T0CKI/AN2 pin
0 = Disables the external interrupt on GP2/INT/T0CKI/AN2 pin
GPIE:
GPIO Interrupt on Change Enable bit
1 = Enables the GPIO Interrupt on Change
0 = Disables the GPIO Interrupt on Change
T0IF:
TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF:
INT External Interrupt Flag bit
1 = The external interrupt on GP2/INT/T0CKI/AN2 pin occurred (must be cleared in software)
0 = The external interrupt on GP2/INT/T0CKI/AN2 pin did not occur
GPIF:
GPIO Interrupt on Change Flag bit
1 = GP0, GP1, or GP3 pins changed state (must be cleared in software)
0 = Neither GP0, GP1, nor GP3 pins have changed state
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
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