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參數(shù)資料
| 型號： | ZL30102QDG1 |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64 |
| 文件頁數(shù)： | 29/48頁 |
| 文件大?。?/td> | 944K |
| 代理商： | ZL30102QDG1 |
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ZL30102
Data Sheet
29
Zarlink Semiconductor Inc.
When the redundant timing card is switched to becoming the active timing card, the system controller should do the
following:
select Primary Master mode, SEC_MSTR=0
select Automatic mode, MODE_SEL1:0=11
The new active timing card will automatically select a valid input reference REF0 or REF1. If both input references
are available and valid, then REF0 will be chosen over REF1. If the new active timing card should use the same
input reference (REF0 or REF1) as the old active timing card used before it failed, The system controller should do
the following instead:
select Holdover (manual) mode, MODE_SEL1:0=01
select Primary Master mode, SEC_MSTR=0
select the required reference (REF0 or REF1) as the input reference
Normal Mode, MODE_SEL1:0=00 (forces device to the input reference set at REF_SEL)
select Automatic mode, MODE_SEL1:0=11
It is recommended to maintain HMS=1 when switching from redundant to active through the Holdover mode, to
eliminate output phase transients.
When the active timing card is switched to becoming the redundant timing card, the system controller should do the
following:
select Normal (manual) mode, MODE_SEL1:0=00
select Secondary Master mode, SEC_MSTR=1
select REF2 and REF2_SYNC as the input reference, REF_SEL1=1
The ZL30102 allows for the switch from Secondary Master mode to Primary Master mode with no frequency or
phase hits on the output clocks. The switch from Primary Master mode to Secondary Master mode may introduce a
phase transient on the output clocks as the TIE correction circuit is disabled to allow the Secondary master device
to track the active clocks closely.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL30102 | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| ZL30102QDG | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| ZL30105QDG1 | T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110 |
| ZL30105 | Power Clamp On Multimeter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Approval Categories:CAT III 600V; Calibrated:No; Current Measuring Range:0-400.0A; Current Setting AC:400A RoHS Compliant: NA |
| ZL30105QDG | Digital Clamp-On Meter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Calibrated:No; Current Setting AC:1000A; Resistance Measuring Range:400 Ohm to 10 MOhm; Voltage Measuring Range AC:600V RoHS Compliant: NA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL30105 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 |
| ZL30105_05 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110 |
| ZL30105QDG | 制造商:Zarlink Semiconductor Inc 功能描述:CLOCK SYNTHESIZER 64TQFP - Bulk |
| ZL30105QDG1 | 制造商:Microsemi Corporation 功能描述:CLOCK SYNTHESIZER 64TQFP - Trays 制造商:Microsemi Corporation 功能描述:IC Pb Free T1/E1 System Synchronizer 制造商:Zarlink Semiconductor Inc 功能描述:CLOCK SYNTHESIZER 64TQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:IC Pb Free T1/E1 System Synchronizer |
| ZL30106 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH/PDH Network Interface DPLL |
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