參數(shù)資料
型號(hào): XR88C681CJTR-F
廠商: Exar Corporation
文件頁(yè)數(shù): 75/101頁(yè)
文件大?。?/td> 0K
描述: IC UART CMOS DUAL 44PLCC
標(biāo)準(zhǔn)包裝: 500
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 1 字節(jié),3 字節(jié)
電源電壓: 4.75 V ~ 5.25 V
帶并行端口:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 帶卷 (TR)
其它名稱: XR88C681CJTR-F-ND
XR88C681
75
Rev. 2.11
RXDn
Receive Holding
Register
To Data Bus
(To be read by the CPU)
Transmit Holding
Register
TXCn
8
From Data Bus.
(Parallel Data from CPU)
8
TXDn
VCC
Figure 40. A Block Diagram depicting Local Loopback Mode Operation
Receive Shift Register
Transmit Shift Register
In this mode:
1. The transmitter output is internally connected to the
receiver input.
2. The transmit clock is used for the receiver.
3. The channel’s TXDn output is held marking (high).
4. The channel’s RXDn input is ignored.
5. The transmitter is enabled, but the received need not
be enabled.
6. CPU to transmitter and receiver communications
continue normally.
Remote Loopback Mode.
This mode is selected by setting MR2n[7:6] = 11.
Figure 41 presents a diagram depicting Remote
Loopback Mode operation.
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