參數(shù)資料
型號: XR88C681CJTR-F
廠商: Exar Corporation
文件頁數(shù): 64/101頁
文件大?。?/td> 0K
描述: IC UART CMOS DUAL 44PLCC
標(biāo)準(zhǔn)包裝: 500
特點: *
通道數(shù): 2,DUART
FIFO's: 1 字節(jié),3 字節(jié)
電源電壓: 4.75 V ~ 5.25 V
帶并行端口:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 帶卷 (TR)
其它名稱: XR88C681CJTR-F-ND
XR88C681
65
Rev. 2.11
data, at the Data Bus, specifying the bits, within the OPR,
to be set ( 1 = set, 0 = no change). A bit is cleared by the
address triggered “CLEAR OUTPUT PORT BITS”
command (see
Table 1) with the accompanying data, at
the Data Bus, specifying the bits to be reset (1 = cleared, 0
= no change).
F.1 Writing Data to the OPR/Output Port Pins
As mentioned earlier, the state of the OPR and
consequently, the Output Port pins is controlled by two
“Address Triggered” commands.
D
Set Output Port Bits Command
D
Clear Output Port Bits Command
The procedure and effect of using these commands are
discussed in
Section F.1.1.
F.1.1 Set Ouput Port Bits Command
The actual procedure used to invoke the “SET OUTPUT
PORT BITS” command is the same as writing the
contents on the Data Bus (D7 - D0) to DUART Address
0E16 for (OP7 - OP0). For every “1” that exists within the
latched contents of the Data Bus, the corresponding bit,
within the OPR is set to a logic “high”. For every “0” that is
present on the data bus and is written to DUART Address
0E16, the state of the corresponding bit, within the OPR is
unchanged.
We could state this another way as: For every “1” that is
present on the Data Bus, during the use of the “SET
OUTPUT PORT BITS” command, the corresponding
Output Port pin is set to a logic “l(fā)ow”. And for every “0” that
is present on the Data Bus, during this command, the
state of the corresponding Output Port pin is unchanged.
For Example:
Suppose that the content of the OPR are OPR[7:0] = [0, 0,
0, 0, 1, 1, 1, 1]. Hence, the state of the Output Port pins
are as follows:
[OP7, OP6, OP5, OP4, OP3, OP2, OP1, OP0] = [1, 1, 1, 1,
0, 0, 0, 0]
If we write the following to DUART Address 0E16;
[D7,...,D0] = [1, 1, 1, 1, 0, 0, 0, 0]; the resulting state of the
Output Port Register Bits follows:
OPR[7:0] = [1, 1, 1, 1, 1, 1, 1, 1].
Consequently, the state of the Output Port pins are as
follows:
[OP7, OP6, OP5, OP4, OP3, OP2, OP1, OP0] = [0, 0, 0, 0,
0, 0, 0, 0]
This example of the “SET OUTPUT PORT BITS”
command is illustrated in
Figure 33.
State of Output Port Pins (OP7 - OP0)
Initial OPR[7:0]
Final OPR[7:0]
Data Bus, D7 - D0
Figure 33. Illustration of the “SET OUTPUT PORT BIT” Command and its Effect
on the Output Port Register and the State of the Output Port Pins.
DUART Address 0Eh
1
0
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