參數(shù)資料
型號(hào): XR16L2551ILTR-F
廠商: Exar Corporation
文件頁(yè)數(shù): 1/49頁(yè)
文件大?。?/td> 0K
描述: IC UART FIFO 16B DUAL 32QFN
標(biāo)準(zhǔn)包裝: 3,000
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.25 V ~ 5.5 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 帶卷 (TR)
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16L2551
LOW VOLTAGE DUART WITH POWERSAVE
MAY 2007
REV. 1.1.3
GENERAL DESCRIPTION
The XR16L2551 (L2551) is a low voltage dual
universal asynchronous receiver and transmitter
(UART) with 5 Volt tolerant inputs. The device
includes additional capability over the ST16C2550:
Intel and Motorola data bus interface selection,
hardware and software flow control, infrared encoder/
decoder, sleep mode and a PowerSave mode for
battery operation. The L2551’s enhanced register set
is compatible to the ST16C2550 and XR16L2550. It
supports the Exar’s enhanced features of 16 bytes of
TX and RX FIFOs and a complete modem interface.
Onboard registers provide the user with operational
status and data error tags. An internal loopback
capability allows onboard diagnostics. Independent
programmable baud rate generator is provided in
each channel to support data rates up to 3.125 Mbps.
NOTE: 1 Covered by U.S. Patent #5,649,122.
APPLICATIONS
Battery Operated Instruments
Data Port Adapters
Handheld Appliances
Radio Frequency Data Modems
Base Stations
USB Hubs
Industrial Automation Controls
FEATURES
2.25 to 5.5 Volt Operation
5 Volt Tolerant Inputs
Intel or Motorola Bus Interface Select (16/68#)
pin
Pin-to-pin compatible to XR16L2751CM
Two Independent UARTs
Up to 3.125 Mbps at 5V, 2 Mbps at 3.3V, and 1
Mbps at 2.5V with external clock input
Up to 1.5 Mbps at 5V, 1.25 Mbps at 3.3V and 1
Mbps at 2.5V with crystal clock input
16 bytes of Transmit and Receive FIFOs
Automatic RTS/CTS hardware flow control
Automatic Xon/Xoff software flow control
Wireless infrared encoder/decoder
Receive FIFO trigger levels select
Programmable character lengths (5, 6, 7 or 8)
with even, odd, forced or no parity
Full Modem Interface
(CTS#, RTS#, DSR#,
DTR#, RI#, CD#) in the 48-TQFP package
Sleep Mode with PowerSave feature for battery
operation
Industrial Temperature range
Tiny 32-QFN, no lead package (5x5x0.9mm)
48-TQFP Package
FIGURE 1. XR16L2551 BLOCK DIAGRAM
XTAL1
XTAL2
Crystal Osc/Buffer
TXA, RXA,
RTSA#, CTSA#,
( DTR#, DSR#
CD#, RIA#, OP2A# )
Intel or
Motorola
Data Bus
Interface
UART Channel A
16 Byte TX FIFO
16 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
2.25 to 5.5 Volt VCC
GND
*5 Volt Tolerant Inputs
2551BLK
UART Channel B
(same as Channel A)
A2:A0
D7:D0
CSA# (CS#)
16/68#
CSB# (A3)
INTA (IRQ#)
INTB (logic 0)
PwrSave
IOW# (R/W#)
IOR# (VCC)
Reset (Reset#)
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#
TXB, RXB,
RTSB#, CTSB#,
( DTRB#, DSRB#
CDB#, RIB#, OP2B# )
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