參數(shù)資料
型號(hào)： XR16L2551ILTR-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 13/49頁(yè)
文件大小： 0K
描述： IC UART FIFO 16B DUAL 32QFN
標(biāo)準(zhǔn)包裝： 3,000
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 16 字節(jié)
規(guī)程： RS232，RS485
電源電壓： 2.25 V ~ 5.5 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 32-QFN 裸露焊盤（5x5）
包裝： 帶卷 (TR)
XR16L2551
20
LOW VOLTAGE DUART WITH POWERSAVE
REV. 1.1.3
2.17
Sleep Mode with Auto Wake-Up and PowerSave Feature
The L2551 supports low voltage system designs, hence, a sleep mode with auto wake-up and PowerSave
feature is included to reduce power consumption when the device is not actively used.
2.17.1
Sleep Mode
All of these conditions must be satisfied for the L2551 to enter sleep mode:
■ no interrupts pending for both channels of the L2551 (ISR bit-0 = 1)
■ divisor is a non-zero value (ie. DLL = 0x1)
■ sleep mode of both channels are enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pins are idling at a logic 1
The L2551 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The L2551 resumes normal operation by any of the following when PowerSave mode is disabled:
■ a receive data start bit transition (logic 1 to 0)
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the L2551 is awakened by any one of the above conditions, it will return to the sleep mode automatically after
all interrupting conditions have been serviced and cleared. If the L2551 is awakened by the modem inputs, a
read to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while
an interrupt is pending from channel A or B. The L2551 will stay in the sleep mode of operation until it is
disabled by setting IER bit-4 to a logic 0.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. Also, it is important to keep
RX A/B inputs idling at logic 1 or “marking” condition during sleep mode to avoid receiving a “break” condition
upon the restart. This may occur when the external interface transceivers (RS-232, RS-485 or another type)
are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the designer can use a
47k-100k ohm pull-up resistor on the RXA and RXB pins.
2.17.2
PowerSave Feature
If the address lines, data bus lines, IOW#, IOR#, CSA#, CSB#, and modem input lines remain steady when the
L2551 is in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on page 36. If the input lines are floating or are toggling while the L2551 is in sleep mode, the
current can be up to 100 times more. If not using the PowerSave feature, then an external buffer would be
required to keep the address and data bus lines from toggling or floating to achieve the low current. But if the
PowerSave feature is enabled (pin 12 of the 48-TQFP or pin 9 of the 32-QFN is connected to VCC), this will
eliminate the need for an external buffer by internally isolating the address, data and control signals (see
Figure 1 on page 1) from other bus activities that could cause wasteful power drain.
The L2551 enters
PowerSave mode when the PWRSAVE pin is connected to VCC and the L2551 is in sleep mode (see Sleep
Mode section above).
Since PowerSave mode isolates the address, data and control signals, the device will wake-up by:
■ a receive data start bit transition (logic 1 to 0)
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
The L2551 will return to the PowerSave mode automatically after a read to the MSR (to reset the modem
inputs) and all interrupting conditions have been serviced and cleared. The L2551 will stay in the PowerSave
mode of operation until it is disabled by setting IER bit-4 to a logic 0 and/or the PowerSave pin is connected to
GND.
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