參數(shù)資料
型號(hào): XR88C681CJTR-F
廠商: Exar Corporation
文件頁數(shù): 74/101頁
文件大?。?/td> 0K
描述: IC UART CMOS DUAL 44PLCC
標(biāo)準(zhǔn)包裝: 500
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 1 字節(jié),3 字節(jié)
電源電壓: 4.75 V ~ 5.25 V
帶并行端口:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 帶卷 (TR)
其它名稱: XR88C681CJTR-F-ND
XR88C681
74
Rev. 2.11
RXDn
Incoming
Serial Data
Receive Holding
Register
RXCn
Receive Shift Register
To Data Bus
(To be read by the CPU)
Transmit Shift Register
Transmit Holding
Register
TXCn
TXDn Outgoing Serial
Data
8
CPU has no access to
the Transmitter
Figure 39. A Block Diagram Depict Automatic Echo Mode
In this mode:
1. Received data is transmitted on the channel’s TXD
output.
2. The receiver must be enabled but the transmitter need
not be enabled.
3. The channel’s TXRDY and TXEMT status bits are
inactive.
4. The received parity is checked but is not generated for
transmission. Thus, transmitted parity is as received.
5. Character framing is checked but the stop bits are
transmitted as received.
6. A received break is echoed as received until the next
valid start bit is detected.
7. CPU to receiver communications operates normally,
but the CPU to transmitter link is disabled.
Each DUART channel can be configured into one of two
diagnostic modes.
Local Loopback Mode
This mode is selected by setting MR2n[7:6] = 10.
Figure 40 is a diagram depicting Local Loopback Mode
operation.
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